Double-Sided Polished Silicon Wafers for Optics

1) What is a Double-Sided Polished (DSP) Silicon Wafer?

A DSP silicon wafer is polished on both the front and back surfaces to achieve very low roughness and strong parallelism between faces. Compared with wafers that only have a polished front side, DSP wafers provide two usable optical interfaces. This matters for systems that rely on backside illumination, through-wafer optical transmission, or bonding where both surfaces contribute to stack flatness.

2) DSP vs SSP: Why Backside Polishing Changes Optical Results

Single-side polished (SSP) wafers can be excellent for many electronics and process-development tasks, but optical setups quickly reveal the limits of an unpolished backside. Backside roughness can scatter light, increase background noise, and create instability in interferometric measurements.

DSP wafers address these issues by providing a second optical-quality surface and better face-to-face parallelism helpful in interferometry, cavity optics, and backside-illuminated detectors.

3) Optical-Grade Silicon: Transmission and Surface Quality

In optics, silicon is often used as more than a mechanical carrier. It functions as an infrared window or transmissive element in optical paths, particularly in the near-IR (NIR) and mid-IR (MIR) where silicon is largely transparent.

Surface Roughness and Optical Scattering

Surface roughness is closely tied to scattering. In precision optical systems, even small surface texture can mask weak signals. DSP polishing is used to achieve sub-nanometer roughness levels so stray scatter is reduced and contrast improves—especially important in IR microscopy and OCT-style setups.

4) Flatness Specs that Matter: TTV, Bow, and Warp

Optical performance depends heavily on thickness uniformity and global wafer shape. Total Thickness Variation (TTV) affects optical path length and focus across the field, while bow and warp influence bonding quality and mounting stress.

For high-precision optical alignment and wafer bonding, many U.S. labs target very tight TTV requirements (< 5µm). When TTV is controlled, it becomes easier to build stable interferometers and bonded stacks without constant re-calibration.

5) Common DSP Wafer Sizes for U.S. Optics Labs

Most optics and photonics groups in the United States work within standard semiconductor tooling, which makes these diameters especially common:

• 100 mm (4 inch) and 150 mm (6 inch): For university cleanrooms, optical metrology, and lab-on-chip development.
• 200 mm: For wafer-level imaging arrays, bonding workflows, and pilot-scale processes.

6) Where DSP Wafers Show Up in Optics

• Infrared imaging: IR window components where surface quality affects contrast.
• Wafer bonding: For optical stacks and aligned multi-layer devices.
• Backside illumination: Sensors where both surfaces impact optical response.
• Microfluidics: Lab-on-chip optics where optical paths intersect etched channels.

7) Diameter, Thickness, and Resistivity

Optics programs often require the wafer to act as both an optical interface and an electrical platform. Higher resistivity silicon can help reduce electrical coupling in RF-adjacent optics, while moderate resistivity may be preferred when integrating on-chip electrical elements.

8) Prime vs Test Grade DSP: Match Quality to Your Stage

• Prime grade DSP: Best for final verification runs, low-particle environments, and high-sensitivity optical measurements.
• Test grade DSP: A cost-effective choice for development work where cosmetic specs can be slightly relaxed.

9) U.S. Sourcing and Lead-Time Strategy

For U.S. teams, procurement has become part of project planning. Tariffs and logistics can affect both price and delivery timing. Many labs reduce risk by selecting U.S.-stocked inventory when possible, and only moving to specialty sourcing when a unique spec is required.