Polished silicon substrates can be packed in several different ways. The most common is a hard plastic cassette that contains the wafer carrier below that supports the wafers for handling and shipping.
Below is a typical wafer with a polished surface that is reflective like a mirror. If these were DSP silicon, then both sides would be mirror like. If single side polished. The front side is considered the polished side. You can tell the back-side of the wafer as it will be opaque and not-reflective.
Mirror surface of the wafer.
Polished wafer in wafer carrier and cassette.
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Polished silicon wafers with a smooth, mirror like surface are ubiquitous in the semiconductor industry for fabricating Integrated Circuits (ICs) surface. Polishing requires several steps and keeping the particle count to minimum is an absolute must to consider the wafers as pristine or prime grade. Chemical mechanical polishing (CMP) is the main method used by wafer fabs to polish substrates. CMP affects the surface of the wafer’s with chemicals by loosening the surface’s atomic bonding. The chemicals flow onto the wafer as it rotates on the polishing bed.
Researchers have been experimenting with other polishing methods to save on chemical costs and time. One potential method is to not polish at all. Instead a kerf-less method is used. Molten silicon is poured into a mold that is shaped like a silicon wafer of a certain size. The advantage of doing this saves on the kerf. Kerf is the dust that is the result of wire sawing an ingot into wafer form.
Double side (DSP) Silicon wafers and single side (SSP) polished silicon wafers are available. DSP wafers are much more complicated to fabricate as getting both sides of the wafer to be the exact as the other side is both art and science, and the equipment needed and technicians cost more.
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We have polished silicon wafers that are suitable for hydrophilic samples (for standard HRSEM microscopy)