P-Type Silicon Wafers All Diameters for Research & Production

university wafer substrates

Typical Client Question regarding p-type silicon wafers:

Below is a typical interaction with a research client. Let us know how we can help you.

After looking at your online store, I think we might go with your cheapest silicon wafers, product D 444. I am in a group that is working on a Senior Design Project to create a biobattery. We need a substrate to pattern with photolithography and subsequently deposit various precious metals on that will catalyze certain reactions and conduct electricity. If you have any advice on specific types of wafers we will need for such nano electronic devices I would be happy to know. Thanks.

UniversityWafer, Inc. Reply:

We make nanomaterials in our lab and one approach is using electrical explosion of wires (EEW). We used one of Scott's old Si wafers (doped with B) and broke off a strip of Si that we attached to electrodes in our EEW apparatus. It worked nicely and we are looking to do the same thing with Ge (Germanium Wafer). We need a wafer that is less than 500 microns thick. Fill out the form and receive an immediate quote.

See bottom of page for recent Silicon Wafers specials.


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P-type Si Wafer in Hard Plastic Cassette

Please let us know what specs and quantity we can quote for you!

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p-type boron doped silicon wafers

High Resistivity P-Type Silicon Wafers for Sensor Fabrication

Research scientists have used the following specs to fabricate sensors in a cleanroom environment.

100mm P/Boron (100) 3000-4000 ohm-cm 500+/-15um SSP PRIME

Please fill out the form for an immediate quote.

P-Type Silicon Wafer Applications

P-type silicon wafers for use in high performance, energy efficient and energy efficient applications such as solar cells and solar cells.

P-type wafers are heavily doped with 111 materials used in research and development lithography and are therefore not suitable for SEM analysis. P wafers can have an epi substrate, which is normally used for bipolar devices such as solar cells, solar cells and solar modules. Note: It is not recommended to use Epi substrates normally, as these pieces are shaped like cakes and the 111 materials are therefore not ideal for use in high-performance silicon cells.

Where Can I Find Diffusion Doped P on N PV-Silicon Wafers?

A scientist asked us to quote the following:

I need a diffusion doped “p on n Si” wafers. Can you please provide me detail on this?

Can you please list out available such PVs with specifications? I don’t need a lot. Probably within 10 or may be higher.

Also, do you have GaInP PV cells? Can you provide me details?

Can you please let me know if you have any other doping profile which can provide better performance

Also, can you provide rough estimation of price for the same size and depth as you had attached in last email. 

UniversityWafer, Inc. Quoted:

We have a facility to make the diffusion and create p on n PV-Si wafers. I attach the photos of the wafers after the process. Boron element (p-type) we can diffuse into the depth from  0.5 µm to maximum ~3µm. The most common depth is about 1µm. Concentrations that are available are up to ~5E19/cm³. Typically 0.5-1E19 /cm³.  After the diffusion we remove the appearing oxides.  Process temperature is approximately 1000-1100° C. Adequate substrates (n-type, Phos. doped) we have too. Please let me know what you need in more detail and we return with the quote.

Better performance you achieve using higher concentrations. We offer:

Item   Qty.   Description
GX82g. 10   Silicon wafers, per SEMI Prime, P/E 4"Ø×525±25µm,
                      p-type Si:B[100], Ro=(5-10)Ohmcm,
                      TTV<10µm, Bow<40µm, Warp<40µm,
                      One-side-polished, back-side Alkaline etched,
                      With Diffused Phosphorus layer ~500nm thick, Nc~5E19/cm³, Ro~0.001 Ohmcm,
                      SEMI Flats (two),
                      Sealed in Empak or equivalent cassette.
Price: $Please contact us for pricing

Please see a photo of the wafer after the diffusion process. This is how the surface looks. 

silicon surface after diffusion process

HF etched p-type Silicon Wafers (to Remove SiO2)

A researcher asks:

Can you provide HF etched p-type Si wafers (to remove SiO2), so that we don't have to go the rather scary procedure to do it here. Once a Si waver is HF ezched, how long can one keep it before it oxidizes again?

The other specs would be p-type Silicon, cut (100), ca. 1 Ohm cm, dia 1", thickness 500um (but is not critical), 10 pcs.

UniversityWafer, Inc. Replied:

All wafers we offer are HF-etched and cleaned before sale. However they oxidize and passivate very quickly. If you need to use bare Si cleaning prior use is inevitable.

Please ask which wafers we quoted.

Float Zone (FZ) 6"Ø×25mm P-type Si:P[100],(7,025-7,865)Ohmcm, 1 SEMI Flat We have a large selection of Prime, Test and Mechanical Grade Undoped, Low doped and Highly doped Silicon wafers 1" - 12" Silicon Wafers low doped and highly doped in stock and ready to ship. Examples full and partial silicon wafer cassettes include:

Current special on MEMC Silicon Wafers 100mm, 150mm and 200mm! Please ask for inventory list!

Super thin Silicon Wafers

100mm P/B (100) 1-10 ohm-cm 25um 2um thin Silicon also available!

Below are just one of the wafer specs that we have on sale!

  • 1" Undoped Silicon (100) >1,000 ohm-cm 250um DSP
  • 2" P/Boron (100) 1-10 ohm-cm 280um SSP
  • 3" N/Phosphorus (100) 0.01-0.02 ohm-cm 380um DSP
  • 4" Intrinsic Silicon (100) >20,000 ohm-cm 500um DSP
  • 6" P/B (111) <1 ohm-cm 300um SSP
  • 8" Intrinsic (100) >5,000 ohm-cm 750um SSP
  • 12" P/B (100) 10-20 ohm-cm DSP 850um
Silicon Material Safety Data Sheet Available upon request.

We have plenty of silicon wafers at a low price and small quantities of partial cassettes so you can buy less than 25 wafers and as few as one Si wafer. 

We can custom make wafers in small quantities. We can dice them, thin them to 2um. We have undoped, low doped and highly doped Silicon substrates that are always in stock.

Recent Silicon Wafer FAQs

What is surface flatness of silicon wafer?

We have Ultra-Flat Silicon with the following spec
Prime Silicon Wafers 100mm P-type /Boron doped <1-0-0> 490-510 micron 0.005-.020 ohm-cm Semi Std Double Side Polished Total Thickness Variation (TTV)<1 um. These are great for making SOI or MEMS!

What is the roughness value (rms) silicon wafer?

The majority of our Prime Grade wafers have a roughness value Ra<5Å.

What is the definition of silicon wafers?

A Si wafer, or substrate, or silicon is grown in a tube from a seed into a long ingot that is then sliced into various thicknesses used in electronics for the fabrication of integrated circuits and in photovoltaics. The wafer serves as the substrate for microelectronic devices built in and over the wafer and undergoes many microfabrication process steps such as doping or ion implantation, etching, deposition of various materials, and photolithographic patterning. Finally the individual microcircuits are separated (dicing) and packaged.

Do you sell platinised silicon wafers?

Yes! We sell Platinised and thin films of almost all the metals! Just let us know the specs and quantity for an immediate quote!

Do you sell one silicon wafer? If so, how?

Yes! We sell as few as one Silicon wafer. We sell in individual wafer carrier.

How do you clean Si 100 wafer before silicon dioxide is formed for bump production?

The RCA clean is a standard set of wafer cleaning steps which need to be performed before high-temperature processing steps (oxidation, diffusion, CVD) of silicon wafers in semiconductor manufacturing.
Werner Kern developed the basic procedure in 1965 while working for RCA, the Radio Corporation of America.[1][2][3] It involves the following chemical processes performed in sequence: Removal of the organic contaminants (organic clean + particle clean) Removal of thin oxide layer (oxide strip, optional) Removal of ionic contamination (ionic clean)

Can You Resize Silicon Wafers from 200mm to 100mm?

Yes! We can laser down the wafer so you could get two 100mm from one 200mm wafers including flats!

What is Silicon Wafer Reclaim?

It's when you have a wafer that has thin films or oxide etc on them and we strip and clean them so the wafers can be reused. Often companies that want to save money or protect their intellectual property will reclaim their wafers.

Which keyword did you use to find us? Tell us and you'll receive a discount on your order!

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  • Super Thin Silicon used for Solar Application with >45% effiencies
  • Thick Silicon wafers used as substrates for depositing various films on them, like polymer membranes.
  • Intrinsic Silicon wafers that let circuits built on it act very fast. This is also why one uses SOI wafers.
  • Low resisivity Silicon wafers used by laboratories that use Epi growth reactors.
  • Standard substrates used for npn transistor circuits npn transistorand optical applications.
  • Inexpensive Silicon wafers used to make ultra-pure and ultra-clean carrier that do not react with the organic sample to be analyzed.

P-Type Silicon Wafer Applications

This paper will examine the most important issues in the development of n-type silicon-based solar cells, progress in addressing them and their potential applications. In the following section we describe the manufacturing processes of solar cells, in which crystalline silicon of type N is used as the base absorber material for the main solar cell manufacturing process. [Sources: 0]

P-type cells, the raw materials that precede the drawing and cutting of silicon wafers, are the same for P and N cell types. [Sources: 2]

In the case of P silicon, the minority carrier for N silicon is a hole instead of an electron, and this type of silicon offers a higher minority carrier diffusion length compared to other silicon types, such as boron silicon wafers. The results suggest that the reduction in the widespread defects is partly due to the use of a more efficient method of using these silicon types. P cells normally dock the cells on the silicon wafer with a mixture of borson, which has one electron less than silicon, to form a positively charged cell. In this case, a high efficiency of the cell is achieved in the millisecond range by placing a minority of carriers for both P-type and N-type semiconductors in a single wafer, but the higher efficiency cell, where higher efficiency is required. [Sources: 0, 3, 9]

P - silicon wafers with boron - Czochralski - doped silicon and silicon - doped Si, silicon compensating for P-type. H - layer defects, the recombination center related to Borson and the defective H layer of silicon. P types in a single wafer: a high efficiency cell with a minority of carriers for P and N semiconductors in the same cell. [Sources: 0]

P - silicon wafers with boron - Czochralski - doped silicon, silicon that compensates for boron defects, the light-induced recombination center and the defective H-layer. [Sources: 0]

Sak and J-HL used exfoliating silicon wafers to produce solar cells and measure their efficiency. P - silicon solar cell with a front-boron emitter efficiency of over 17%, printed on an industrial screen and achieving an efficiency of about 16%. A cost-effective silicon solar cell, manufactured with 100 mm thick wafers and achieving an efficiency of 18% to 20%, with a highly efficient photovoltaic system. [Sources: 0, 1, 6]

P - silicon solar cells with an efficiency of over 17% in the front-panel heater, which was achieved in the 1960s, reached 14% -7% in 1960 and reached 11 efficiencies of 18% to 20% for the same wafers in 2010. [Sources: 0]

N - Silicon has a longer life span when Cr is 100% (partially or completely) associated with the carrier, with a life span of at least 10 years. Since it does not contain boron - related defects (in contrast to p - silicon species), it is reported that the life of carrier minorities is limited by grown - to - point defects. [Sources: 0]

Extended defects are visible in the crucible - grown - straightened - solidified silicon - which forms the basis for the cultivation of silicon solar cells (including the use of p - silicon wafers as shown in FIG). 1, listed below). This process makes the solar cell 100%, and it is expected that the process can include a large number of different types of carrier minerals (e.g. boron, beryllium, etc.). There are ongoing efforts to make cells from thin silicon wafers and improve the design of thinner silicon solar cells. [Sources: 0, 7]

This can be used to make small silicon substrates by breaking the wafers into small pieces, such as the EWT cells shown in FIG. 1, made from the crucible - cultivated - straightened - solidified silicon (P - silicon) wafer (listed below). This has the advantage that WAFers can be grown from materials other than silicon and has the potential to produce solar cells with a variety of carrier minerals and other materials. This can cause problems in the production of thin silicon cells, but also a number of advantages over conventional silicon solar cells. [Sources: 4, 5, 8]

P - silicon wafers from crucible - cultured - straightened - solidified silicon wafers (P - silicon) (listed below) to large - split, larger - than normal silicon wafers (Fig. 2). [Sources: 6]

A comparison of the device characteristics is shown, and the measured values (e) are 1.45 or 1: 35. P - Crucible silicon wafers - cultured - straightened - solidified - solids (R & S) too large - split, larger - than - normal silicon wafers (P- silicon) wafers (Fig. 3). The measured value of F & S is measured for the material silicon by a factor of 2.5 or 1 / 2 for the mass or mass material. A solar cell that uses a fission-forming silicon wafer is a 1-to-35 wafer that is closer to 1 than the solar cells that consume most of a silicon wafer. Solar cells are used in a wide range of applications, such as solar panels, photovoltaic cells, solar power plants and solar thermal cells. [Sources: 6]




[0]: https://www.oatext.com/Emerging-frontiers-of-N-Type-silicon-material-for-photovoltaic-applications-The-impurity-defect-interactions.php

[1]: https://www.scielo.br/scielo.php?pid=S1516-14392020000100220&script=sci_arttext

[2]: https://www.cedgreentech.com/article/solar-cell-efficiency-n-type-v-p-type

[3]: https://www.hindawi.com/journals/tswj/2013/470347/

[4]: https://en.wikipedia.org/wiki/Wafer_(electronics)

[6]: https://www.frontiersin.org/articles/426379

[7]: https://patents.google.com/patent/US20150040979A1/en

[8]: https://www.google.com/patents/US20040261840

[9]: https://www.solarpowerworldonline.com/2018/07/the-difference-between-n-type-and-p-type-solar-cells/