Plasma Etching Silicon Wafers

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Plasma Etching Silicon Wafers

We have a large selection of silicon wafers for plasma etching. Many of our clients prefer our low cost mechanical grade silicon wafers for plasma etching. An item popular with researchers is item #1196. These are 100mm mechanical grade wafers. These wafers are less than $10.00 each! On client uses these mech grade wafers for carving a simple pattern on the wafers by plasma etching.

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Plasma Etching Silicon Wafers

Plasma etching of various metals and dielectrics has long been used in semiconductor construction. Structuring silicon by means of plasma etching is one of the most widely used techniques in silicon-based components, especially when high dimensional accuracy and verticality are required. [Sources: 6, 7]

The etching process can be carried out with a variety of metals such as aluminium, copper and gold. SF-6 CF-4 is used for anisotropic etching of silicon and carbon tetrachloride (CCl 4) is etched in silicon and aluminum. [Sources: 0, 5, 11]

The CF-4 gas used as reaction gas serves to form a plasma in order to etch the oxide layer. The RF energy ionizes the gas and forms a caustic plasma that reacts with the wafer to form a volatile product that is pumped out. Potassium hydroxide (KOH) is also used for etching silicon, while hydrofluoric acid (HF) has been used for etching SiO 2. CF, C and F ions react chemically and the type of plasma is produced, whereby the above-mentioned plasma etching is performed. [Sources: 1, 3, 11]

In accordance with this invention, silicon dioxide was found to be favoured by adding a formaldehyde component to the BF-3 plasma. It was found that the etching rate of silicon dioxide can be increased, although the effect on silicon was not significant. [Sources: 13]

If you consider a high selectivity towards silicon as criteria for choosing the mask, silicon oxide can be considered the best mask for the process if you use it in recipe A for silicon etching. [Sources: 6]

The etching beam, like silicon, would bend in the plane of the wafer. The more silicon wafers are etched, the more difficult the shape of the etched portions will be. [Sources: 8, 12]

Plasma etching is the preferred choice because it offers the possibility to transfer the plane geometry from the vertical wall to the silicon substrate. It also has an etching rate equal to or higher than wet etching and there is no need to create a straight etching profile. [Sources: 6, 8, 9]

The etching rate is strongly influenced by the chemical reactivity of the plasma types produced, which varies depending on the different gases used to produce them. In a plasma etching process, the material removed from the substrate by physical or chemical means can be used as the basis for the transfer of the plane geometry from the vertical wall to the horizontal wall, regardless of the mechanism used. [Sources: 9, 10]

For example, the buffering of hydrofluoric acid (BHF) is often excused by etching silicon dioxide on silicon substrates. When BF-3 plasma gas is used at low frequencies of electrical excitation, it has been shown to be a good candidate for etching silicon oxide (SiO2) in silicon wafers. In line with this invention, we have discovered a new method to demonstrate the transfer of plane geometry from the vertical wall to the horizontal wall of a silicon substrate, and to provide a quick and cost-effective solution to this problem. Since many etching silicones do not react with Si o2, a layer of Si O2 and two layers of silicone can form an excellent etching stop. We used 35 kHz excitation for a period of 30 seconds with a frequency of 1,000 Hz and 2,500 Hz. [Sources: 0, 12, 13]

A critical component, best made of silicon, is the plasma containment ring, which helps keep plasma concentrated on the wafer. [Sources: 2]

In the case of acid etching, an electric power supply can be used to control chemical reactions to supply the hole in the silicon surface. In addition, heating the environment adjacent to the plasma etching system saves the need to encounter a deposition reactor on the wafer during the etching process. [Sources: 12, 13]

This effect allows for very high anisotropy, as shown in the illustration, and is also suitable for the development of high-quality silicon wafers with high thermal conductivity and high surface area. [Sources: 0, 7]

Standard processes include resistance processes to organic strips with oxygen oxide nitrogen oxide and silicon carbide, as well as etching processes with SF-6 chemistry. These processes are available in a wide range of materials such as silicon wafers, polymers, ceramics, plastics and other substrates, as well as in other materials. [Sources: 4]

Conventional semiconductor chip manufacturing technologies require plasma etching, in which a vacuum chamber is filled with an excited and grounded electrode with a plasma containing ions and reaction gases. Known methods for forming recesses or openings in silicon wafers and other materials such as ceramics and polymers are wet etching processes with reactive solutions such as potassium hydroxide and reactive ion etching processes using plasma - the ion reaction gas. [Sources: 8, 13]

In order to avoid etching the underlying silicon sublayer in which the oxide is first clarified, it is desirable to initiate a selective plasma process that does not seriously affect or reduce the etching rate of SiO 2 or significantly reduce the silicon rate. In addition, many other gases can be used for etched photoresist layers such as etched nitride layers or sf etches and for etching different materials. Accordingly, it would be desirable to have a plasma gas composition that can be generated by using low frequencies of electrical excitation. [Sources: 1, 13]

 

 

Sources:

[0]: https://en.wikipedia.org/wiki/Etching_(microfabrication)

[1]: https://patents.google.com/patent/US20050112878A1/en

[2]: https://blog.lamresearch.com/silicon-wafers-and-more/

[3]: https://www.osha.gov/SLTC/semiconductors/devicefab_etching.html

[4]: https://anff-q.org.au/facilities/etching/

[5]: https://www.modutek.com/wet-processing-applications/wafer-etching-process/

[6]: https://www.spiedigitallibrary.org/journals/journal-of-micro-nanolithography-mems-and-moems/volume-16/issue-03/034501/Low-power-low-pressure-reactive-ion-etching-process-for-silicon/10.1117/1.JMM.16.3.034501.full

[7]: https://www.printedelectronicsworld.com/articles/3760/introduction-of-the-linear-plasma-etch-source

[8]: http://www.google.com.om/patents/US5536364

[9]: https://www.sciencedirect.com/topics/materials-science/plasma-etching

[10]: https://www.mksinst.com/n/etch-overview

[11]: https://www.intechopen.com/books/micromachining/silicon-based-micromachining-process-for-flexible-electronics

[12]: https://www.texaspowerfulsmart.com/carbon-nanotubes-2/ze-m.html

[13]: https://www.google.com.pg/patents/US4582581