Lapped Silicon Wafers to Fix the Wafer's Surface Damage

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Silicon Wafer Lapping Process

The lapping of Silicon Wafers is a process that has been around as long has substrates needed a very flat and polished surface. The lapping techinique is to this day the best machining process that gives the silicon substrate a higher quality finish that are characterized by isotropic properties.

lapped silicon wafer

Lapped Silicon Wafers

After slicing the ingot there is usually a mechanical double side polished lapping step to remove damage left by slicing to achieve a high degree of parallelism and flatness of the wafer. Lapping performed under rotational pressure with pads and an abrasive slurry mixture that typically consists of alumina or silicon carbide and glycerine. Flatness is a critall wafer parameter for many process steps in the wafer fabrication process.

A polished wafer edge finish (also called ege grind) is applied to the wafer to contour a smooth radius on the edge of the wafer create mechanical stress in the wafer that activates crystal dislocations, especially during thermal process steps that occur in the wafer fabrication. Crevices can also be the source of unwanted contamination buildup as well as particulate flaking during fabrciation. A smooth edge readius is important to minimize these concerns. Futhermore, chipped edges are a source of edge dislocation growth during thermal cycles in the wafer fabrication process.

UniversityWafer, Inc. uses a polishing pad along with polishing liquid to to remove excess silicon from a wafer surface. The reason for Lapping process is to de-stress the ingot during slicing. Lapping also removes defects on the both sides of the wafer's surface.

Below are just some of the Lapped Silicon Wafers that we have in stock.

Item # Qty $/Wafer Type/Dopant Orient. Dia(mm) Thick(μm) Polish Res Ωcm Notes
2533 2 $100.00 n-type Si:As [100] 6" 1,000 L/L 0.0033-0.0037 SEMI, 1Flat(57.5mm), in individual wafer cassettes
E533 1 $100.00 n-type Si:As [100] 6" 1,000 L/L 0.0033-0.0037 SEMI, 1Flat(57.5mm), in individual wafer cassettes
7201 150 $4.00 n-type Si:P [100] ±3° 156x156 150 ±10 L/L 1--7 PSQ (Pseudo-Square), PV, Coin-roll packed
E189 48 $35.00 n-type Si:P [100] 4" 300 L/L FZ 1,100-1,600 SEMI, 1Flat, Empak cst
D189 25 $35.00 n-type Si:P [100] 4" 300 L/L FZ 800-1,500 SEMI, 1Flat, Empak cst
H189 25 $35.00 n-type Si:P [100] 4" 300 L/L FZ 800-1,500 SEMI, 1Flat, Empak cst
X7299 50 $3.00 n-type Si:As [111-4°] 4" 525 L/L   SEMI TEST (in Opened Empak cst), 2Flats (2nd @ 45°)
D10 298 $5.00 n-type Si:P [111] 2" 400 L/L 120-170 Lapped & edged