Lapped Silicon Wafers

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Lapped Silicon Wafers

After slicing the ingot there is usually a mechanical double side polished lapping step to remove damage left by slicing to achieve a high degree of parallelism and flatness of the wafer. Lapping performed under rotational pressure with pads and an abrasive slurry mixture that typically consists of alumina or silicon carbide and glycerine. Flatness is a critall wafer parameter for many process steps in the wafer fabrication process.

A polished wafer edge finish (also called ege grind) is applied to the wafer to contour a smooth radius on the edge of the wafer create mechanical stress in the wafer that activates crystal dislocations, especially during thermal process steps that occur in the wafer fabrication. Crevices can also be the source of unwanted contamination buildup as well as particulate flaking during fabrciation. A smooth edge readius is important to minimize these concerns. Futhermore, chipped edges are a source of edge dislocation growth during thermal cycles in the wafer fabrication process.

UniversityWafer, Inc. uses a pad along with polishing liquid to to remove excess silicon from a wafer surface. The reason for Lapping process is to de-stress the ingot during slicing. Lapping also removes defects on the both sides of the wafer's surface.