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UniversityWafer, Inc. supplies carrier wafers and support substrates for semiconductor processing, thin-wafer handling, temporary bonding, plasma etching, deposition, wafer thinning, MEMS fabrication and research applications.
Carrier substrates can be supplied in materials including silicon, silicon carbide (SiC), glass, sapphire and quartz or fused silica.
Depending on your process, carrier wafers may be selected by diameter, thickness, surface finish, flatness, thermal properties, chemical compatibility, optical transparency and equipment requirements.
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Tell Us Your Carrier Wafer Requirements
To help us identify an appropriate carrier substrate, include as many of the following specifications as possible:
- Material: Silicon, sapphire, glass, quartz, SiC or other
- Diameter: 2", 3", 4", 6", 8" or custom dimensions
- Thickness: Standard, thick or custom
- Surface: SSP, DSP, polished or etched backside
- Flatness / TTV: If critical to bonding or lithography
- Edge: Flat, notch, round or custom geometry
- Process: Etch, CVD, PVD, lithography, thinning, CMP, etc.
- Maximum process temperature
- Bonding or mounting method
- Required holes, recesses or other custom features
- Quantity
What Does a Carrier Wafer Do?
A carrier wafer provides temporary mechanical support for a wafer, die, thin substrate or small sample during fabrication. It allows fragile or non-standard samples to be handled by semiconductor equipment designed for conventional wafer sizes.
The device wafer or sample may be temporarily attached to the carrier using a process-compatible adhesive, wax, tape or temporary bonding material. In some applications, mechanical fixtures, vacuum or other mounting approaches may also be used.
The mounting method must be compatible with the temperatures, chemicals, vacuum conditions and mechanical loads encountered during processing.
Carrier Wafers for Thin-Wafer Processing
Semiconductor and MEMS substrates can become difficult to handle as they are thinned. Temporarily bonding the device wafer to a mechanically stable carrier can support the substrate during processes such as:
- Backgrinding
- Wafer thinning
- Backside polishing
- Backside etching
- Lithography
- Thin-film deposition
- Metallization
- Device singulation
After processing, the device wafer can be debonded using the method appropriate for the temporary bonding system.
How Is a Sample Attached to a Carrier Wafer?
There is no single attachment method used for every carrier-wafer process. The appropriate technique depends on the sample, equipment and subsequent processing conditions.
Common temporary mounting approaches include:
- Temporary bonding adhesives
- Thermal-release materials
- UV-release bonding systems
- Wafer-processing tapes
- Wax-based temporary bonding
- Vacuum or mechanical mounting in compatible tools
For high-precision processes, bond-line thickness and uniformity can be particularly important. Non-uniform bonding can influence the flatness of the supported wafer and affect downstream processes such as thinning or photolithography.
Carrier Wafers for DRIE and ICP-RIE
Researchers frequently use carrier wafers to process small samples in DRIE and ICP-RIE systems.
A small sample can be mounted onto a full-size carrier that is compatible with the tool's chuck. Important considerations can include carrier diameter, backside contact, thermal management, mounting material and compatibility with the plasma chemistry.
One UniversityWafer customer requested a 100mm single-side-polished silicon carrier wafer for holding small samples in DRIE and ICP-RIE equipment. Reference #228287.
Carrier Wafers for Etch and CVD Tools
Shared university cleanrooms and nanofabrication facilities often need to process samples that are much smaller than the wafer size expected by the equipment.
A reusable carrier substrate can provide a stable platform for small samples used in etching, CVD , sputtering and other deposition processes.
For reusable carriers, researchers should consider contamination control, cleaning compatibility, mechanical durability and the thermal behavior of the carrier/sample assembly.
Silicon Carrier Wafers
Silicon is a common carrier-wafer material because it is available in standard semiconductor diameters, can be manufactured with controlled thickness and flatness, and is compatible with many semiconductor fabrication tools.
When silicon is serving only as a mechanical support, electronic parameters such as resistivity, conductivity type and crystal orientation may not be critical. This can make test-grade, mechanical-grade or suitable reclaimed silicon wafers economical options for some carrier applications.
However, the lowest-cost wafer is not automatically suitable for every process. Diameter tolerance, thickness, bow, warp, TTV, surface condition and tool compatibility can still be important.
150mm Silicon Carrier Wafer Example
A researcher previously requested a low-cost 150mm (6") Si (100), P-type wafer approximately 625 µm thick without a thermal oxide layer for use as a carrier wafer.
For applications like this, where the substrate serves primarily as a mechanical support, cost and dimensional compatibility may be more important than device-grade electrical characteristics.
Reference #135588 for specs and pricing.
Carrier Wafers for Electroplating and Metallization
Carrier wafers can also support substrates during electroplating, sputtering and other metallization experiments. Depending on the process, researchers may prioritize surface smoothness and mechanical stability rather than semiconductor electrical properties.
If the carrier itself will receive a deposited metal film, the required surface finish, adhesion layer, deposition temperature and downstream processing should be specified when requesting a quote.
Carrier Wafers for Lithium Niobate Processing
Thin lithium niobate (LiNbO3) substrates can require temporary mechanical support during thinning and device fabrication.
One customer working on an ultrasound-transducer application requested support for thinning a 36° rotated Y-cut lithium niobate wafer to approximately 22 µm while bonded to a substantially thicker glass carrier. Reference #221032.
Applications involving very thin piezoelectric substrates require careful consideration of bonding uniformity, thermal-expansion mismatch, substrate stress and the eventual debonding process.
Sputtered Metal on Silicon Carrier Wafers
Silicon carriers may also be used as platforms for thin-film research. A customer previously requested approximately 200 nm of Au, Pt or W deposited onto a 4-inch silicon carrier wafer, followed by additional silicon growth. Reference #261466.
For multilayer structures like these, researchers should specify the carrier material, surface condition, film material, target thickness, deposition method and temperature requirements.
Carrier Wafers for CMP Research
Carrier substrates can also support thin materials during Chemical Mechanical Polishing (CMP) .
The carrier and bonding system must provide adequate mechanical support while maintaining sufficient flatness for the polishing process. When very low final surface roughness or tight thickness uniformity is required, the entire bonded stack and CMP process must be designed accordingly.
Which Carrier Wafer Material Should You Choose?
There is no universally best carrier-wafer material. The correct choice depends on the fabrication process.
- Silicon: Standard semiconductor-tool compatibility and broad availability.
- Glass: Useful when optical transparency or light-assisted alignment/debonding is required.
- Sapphire: High hardness, electrical insulation, optical transparency and good resistance to many process environments.
- Silicon Carbide: High stiffness and thermal conductivity for demanding thermal and mechanical conditions.
- Quartz / Fused Silica: Optical transparency, electrical insulation and useful chemical and thermal properties for selected fabrication processes.
The carrier material should ultimately be evaluated together with the device substrate, temporary bonding material, maximum process temperature, chemical exposure and equipment requirements.
Need a Custom Carrier Wafer?
UniversityWafer, Inc. can help researchers identify carrier substrates for semiconductor processing, MEMS, photonics, compound semiconductors, thin-wafer handling and materials research.
Send us your material, diameter, thickness, surface finish, processing conditions and quantity, along with any special flatness, hole, recess, flat or notch requirements.
What Is a Carrier Wafer?
A carrier wafer is a temporary support substrate used to hold, stabilize or transport another wafer, thin substrate, die or small sample during semiconductor processing. Carrier wafers are especially useful when the device substrate is too thin, fragile, small or mechanically unsupported to be handled directly by standard fabrication equipment.
Depending on the process, carrier wafers may be made from silicon, sapphire, glass, quartz or silicon carbide (SiC). The best material depends on the thermal, chemical, optical and mechanical requirements of the process.
Why Are Carrier Wafers Used?
Many semiconductor tools are designed to handle full-size, mechanically stable wafers. A carrier wafer allows smaller samples or ultra-thin substrates to be processed using equipment that would otherwise be unable to hold them reliably.
Common carrier wafer applications include:
- Wafer thinning and backgrinding
- Temporary wafer bonding
- Deep Reactive-Ion Etching (DRIE)
- ICP-RIE and plasma etching
- Chemical Vapor Deposition (CVD)
- Physical Vapor Deposition (PVD) and sputtering
- Lithography and resist processing
- Electroplating
- MEMS fabrication
- Compound-semiconductor processing
- Thin-wafer and small-sample handling
- Temporary support during dicing or singulation
How to Choose a Carrier Wafer
The carrier does not always need semiconductor-device-grade electrical properties. Instead, researchers should select the substrate according to the physical requirements of the process and the equipment being used.
| Carrier Specification | Why It Matters |
|---|---|
| Diameter | Must fit the wafer chuck, cassette and processing equipment. Common research sizes include 2", 3", 4", 6" and 8". |
| Thickness | A thicker carrier can provide additional mechanical rigidity, but the total bonded stack must remain compatible with the tool. |
| Flatness / TTV | Important for uniform bonding, lithography, grinding, thinning and other processes that require controlled spacing. |
| Surface Finish | Single-side polished or double-side polished surfaces may be selected according to bonding, optical or process requirements. |
| Thermal Compatibility | Carrier and device materials should be evaluated for thermal expansion when the bonded stack experiences elevated temperatures. |
| Chemical Compatibility | The carrier should tolerate the solvents, acids, bases, plasmas or process gases used during fabrication. |
| Optical Transparency | Transparent glass, quartz or sapphire carriers can be useful for optical alignment or some UV-assisted debonding processes. |
| Holes / Perforations | Custom holes may provide access for vacuum, fluid, solvent-assisted release or specialized fixture designs. |
Silicon Carrier Wafers
Silicon wafers are widely used as carrier substrates because they are readily available in standard semiconductor diameters and can provide excellent dimensional consistency and surface quality.
When the carrier is used primarily for mechanical support, parameters such as dopant type, resistivity or crystal orientation may be less important than diameter, thickness, flatness, surface finish and compatibility with the processing tool.
This is why test-grade silicon, mechanical-grade silicon and suitable reclaimed wafers may be attractive options for some carrier-wafer applications.
100mm, 150mm and 200mm Silicon Carriers
UniversityWafer receives carrier-wafer requests across a range of standard semiconductor diameters, including 100mm (4"), 150mm (6") and 200mm (8") silicon wafers. Researchers often prioritize low cost, mechanical stability and equipment compatibility rather than electronic-grade material properties.
For example, carrier wafers may be selected for plasma etching where crystal orientation or doping is not central to the experiment, provided the wafer meets the dimensional and surface requirements of the etch system.
Sapphire Carrier Wafers
Sapphire is a hard, chemically resistant and electrically insulating crystalline material that can be useful as a carrier in demanding semiconductor and materials-processing environments.
Sapphire carriers may be useful for processing compound-semiconductor substrates such as GaAs and InP, as well as silicon and other materials. Depending on the application, carriers can also be fabricated with holes, recesses or other custom features.
Transparent sapphire can additionally be advantageous when optical access through the carrier is required.
Silicon Carbide (SiC) Carrier Wafers
Silicon carbide carrier wafers can be attractive for processes requiring high stiffness, thermal stability and good thermal conductivity.
SiC may be considered for elevated-temperature processing or applications where mechanical rigidity and heat transfer are important. Selection should still be based on the specific bonding system, device material, temperature range and processing chemistry rather than assuming one carrier material is ideal for every application.
Glass Carrier Wafers
Glass carrier wafers are particularly useful when optical transparency is required for alignment, inspection or light-assisted release processes.
Glass carriers can also provide smooth surfaces suitable for temporary wafer bonding and advanced packaging research. Different glass compositions provide different coefficients of thermal expansion, chemical durability and temperature limits, so the glass should be matched to the process.
Quartz and Fused Silica Carrier Wafers
Quartz and fused silica carriers combine optical transparency with electrical insulation and resistance to many semiconductor process environments.
Researchers may select quartz or fused silica when optical access, low electrical conductivity or compatibility with a particular etch or deposition environment is important. The suitability of any carrier should always be verified against the actual plasma chemistry and processing conditions.
Carrier Wafers for DRIE, ICP-RIE and Plasma Etching
Carrier wafers are frequently used to mount small samples and thin substrates inside DRIE and ICP-RIE equipment. The carrier allows the processing tool to handle the sample as though it were a standard full-size wafer.
For these applications, researchers should consider chuck compatibility, backside cooling, thermal contact, plasma chemistry, carrier thickness and the method used to attach the sample to the carrier.
Carrier Wafers for Etch and CVD Tools
Shared university and nanofabrication facilities often process small samples from many researchers. A reusable carrier wafer can provide a convenient platform for placing those samples into CVD, etch, deposition and other wafer-processing tools.
For frequently reused carriers, mechanical durability, cleaning procedures, contamination control and compatibility with the equipment should be considered in addition to wafer price.
Temporary Bonding and Wafer Thinning
One of the most important carrier-wafer applications is temporary support during wafer thinning. The device wafer can be temporarily bonded to a thicker carrier while the backside is ground, polished, etched or otherwise processed.
Temporary bonding systems can use thermal-release, UV-release or solvent-assisted materials depending on the process. When UV exposure through the carrier is required, a transparent glass, quartz or sapphire carrier may be appropriate.
Bond-line uniformity becomes especially important when the thinned wafer will undergo subsequent lithography or other precision processes.
Carrier Wafers for Compound Semiconductors
Carrier substrates can also support thin or fragile compound-semiconductor materials including GaAs, InP and lithium niobate during thinning, etching, polishing and device fabrication.
For these materials, thermal expansion, bonding conditions, thickness and mechanical stress should be evaluated carefully because the device wafer and carrier may respond differently during processing.
Custom Carrier Wafers
Carrier-wafer requirements can vary considerably from one research project to another. UniversityWafer, Inc. can help researchers identify substrate options according to the dimensions and processing requirements of their experiment.
When requesting a carrier wafer quote, specify:
- Carrier material
- Diameter or dimensions
- Required thickness
- Single-side or double-side polish
- Flat, notch or edge requirements
- Flatness or TTV requirements, if critical
- Required holes, recesses or custom features
- Maximum processing temperature
- Process chemistry or plasma environment
- Temporary bonding or debonding method
- Quantity
Providing these details helps determine whether silicon, sapphire, glass, quartz, SiC or another substrate is the most appropriate carrier for the application.
Carrier Wafer Availability
UniversityWafer has supplied carrier substrates for research involving plasma etching, wafer thinning, temporary bonding, electroplating, sputtering, compound-semiconductor processing and small-sample handling. Available and custom options may include silicon, sapphire, glass, quartz, silicon carbide and other research substrates.
Need a carrier wafer for your fabrication process? Tell us your substrate size, material, thickness, process temperature, surface requirements and quantity so we can help identify suitable options.
Related Carrier Wafer Resources
- Silicon Wafers – Standard and custom silicon substrates for research and fabrication.
- Sapphire Wafers – Hard, chemically resistant crystalline substrates for demanding processes.
- Glass Wafers – Transparent substrates for bonding, packaging and materials research.
- Silicon Carbide Wafers – SiC substrates for high-temperature and advanced materials research.
- Total Thickness Variation (TTV) – Learn why wafer thickness uniformity matters in precision processing.
- Wafer Bonding – Learn about substrate bonding for semiconductor and MEMS fabrication.