Carrier Wafers Silicon, Silicon Carbide, Sapphire, Glass & More

university wafer substrates

Carrier Wafers in Stock and Ready to Ship

Carrier wafer can be silicon, silicon carbide, glass, sapphire, gallium arsenide. The substrate holder for other wafers are bonded onto the carrier wafer. Our carrier wafer's surface is super flat. Please let us know what carrier wafer spec and quantity we can quote for you!

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What is a Carrier Wafer?

Vacuum chemical processes and carrier wafer techniques can require the processing and handling of extremely thin semiconductor wafers with extreme surface texture. For instance, carbon nanotube (CNW) and tourmaline mesotherapy applications involve very thin, stiff substrates that must be prepared before any treatments are applied. The application of a carrier wafer minimizes the production costs for many printed circuit devices (PCE) and other solid-state applications (SEDs). But the most cost-effective method of Carrier-Wafer-Based Packaging'is also advantageous: it reduces the total production costs for both CE/SED hybrid devices and solid-state devices.

How to Attach a Sample to a Carrier Wafer

A carrier wafer, also called a sample wafer is glued to a carrier or dummy wafer. This procedure is usually done in a cleanroom environment, but you can practice doing this anywhere!
Use a stable, flat substrate, carrier wafer, and position it under your sample wafer. Then, when your sample wafer has through-holes or vias, or when the process itself will create such holes, for instance during Deep Reactive-Ion Etching (DRIE).  This simple process can be seen in the video below and it is optimized to be fast and easy to detach the sample from the carrier after processing.

A carrier wafer is simply a thin film of silicon nitride with a front surface that is etched or imprinted with a substrate. In this case, both the back and the front sides of the carrier wafer are treated with different coating materials to create a thicker, uniform carrier layer than on the substrate that is used in the manufacturing of the rest of the device. The thickness of the carrier layer is based upon several factors such as the thickness and type of coating desired, the operating temperature and humidity, the available substrate that is needed, and the method of manufacturing. A carrier wafer has an electrical and mechanical interplay, such that the mechanical properties of the two layers affect one another, which then affect the overall thickness of the carrier wafer.

A carrier wafer typically consists of two layers. One layer is the flat substrate that is used to transfer electric current or to insulate and cool the electric circuit and the other layer is the metallic backing. The flat substrate has a particular thickness that is predetermined, and the metallic backing is a conductive or non-conductive material that can be made of an assortment of alloys, copper, steel, tin, lead, and aluminum alloys and even titanium. Carrier wafers are an integral part of the assembly of electronic devices, especially those that are flat.

Another method of making the carrier is to use a bonding agent between the metallic backing and the flat substrate. This method is referred to as bonded or brazed Silicon wafers, which are often made to be much thinner than regular silicon wafers, sometimes as much as 0.2 millimeters in some cases. They are sometimes called adapter carrier wafers because they are used where there is not a need for the device to be completely sealed. These types of devices are used in communications applications, for example, where it is not feasible to use a seal so the Silicon will still have mobility. They are also used in heating systems.

In the past, many manufacturers have designed and built their own carrier wafer systems by making a solid carrier onto a solid surface. However, manufacturing and assembly of this kind of wafer was a labor-intensive process that could only be done by the most experienced manufacturers. There is an alternative to making a carrier wafer from scratch, and that is to utilize one of the many HDL based silicone wafer systems available today. Instead of starting with a solid carrier and forming the wafer into its final shape, as is done with traditional silicone wafer systems, an HDL based system makes use of its silicone particles to form a thin layer on the surface of a standard sheet of metal. By using a solid base such as aluminum or tin this type of system can be manufactured quickly and much more economically than is possible using a conventional process.

One of the advantages of HDL based carrier wafers is that the thin silicone layer can be applied to any flat surface, including sheet metal, plastic, wood, and more. This makes them highly versatile, and can be adapted to suit any number of applications. This means that flexible substrate attachment is not limited to a few specific industries. Because of this carrier wafer's versatile nature, it has become one of the leading solutions for addressing a wide variety of very small problems that occur in manufacturing.

A typical application includes a wide range of flat plate devices that are used for heating, cooling, and alignment purposes. Another application includes the manufacturing of thermoset resistors for a wide range of electronic components, where thermal expansion and contraction are unavoidable in many situations. It also can be used for bonding and soldering, although a thin wafer handling method is often preferred for these applications. Other uses include bonding of thin films to a standard sheet metal surface, which can help reduce weight and allow for easier soldering and mounting. And, because it has been designed for use with both hot and cold methods of transfer, it can be adapted to a wide variety of different work pieces, including hand grips, shoulder straps, buttons, and more.

As debonding continues to evolve into an alternative method for bonding, companies that have adapted carrier wafer technology can create a higher level of product quality, efficiency, and safety for a number of different industries. These companies can also provide a more cost effective way to produce a wider range of highly conductive components in a shorter amount of time. These companies can take this technology one step further and incorporate some of the most innovative methods for creating a number of different kinds of devices that require debonding, so that these devices can continue to provide a wide range of performance even when the heat and power sources employed in standard bonding processes are not readily available.

 

 

 

How do Scientists Use Carrier Wafers?

Researcher:

I am developing a temporary bonding process with semiconductor wafers and am in need of a specific type of chemical release carrier wafer, for which I am enquiring as to whether you supply. The carrier wafer requires the following basic specifications: * Size: 3 inch (76.2 mm) * Material: Glass (borosolicate or other) or other material, so long as it is transparent to visible light * Perforation, a.k.a. holes, to allow solvent to go through and attack bonding glue * A primary flat (if there is also secondary flat that is not an issue, but there must at least be a primary flat). The first three criteria have not been an issue in my search but it is the combination with the fourth regarding the primary flat which has been the stumbling block. I look forward to hearing from you whether you have a product(s) which can satisfy my requirements.

Those are the main specs. Otherwise, it should be resistant to common process chemicals like organic solvents such as acetone, isopropanol, and menthane (debonding agent), and be able to withstand temperatures up to 220c. If it's glass or a similar material I am not worried about it being able to withstand my process conditions. Thickness is not really important and could really be anywhere in the range of 300-1000 micron.

The main thing is just having the 4 critieria of a primary flat, the holes for the solvent to go through, it being transparent to visible light so that you can physically see the markers on the other wafer that is bonded to the carrier wafer, and it being 3 inch. Everywhere I have managed to look so far has either:
a) 3 inch, holes, transparent. Or
b) 3 inch, transparent, flat ,.

So if you have all 4 that would be amazing.

I would need a box of 25.

UniversityWafer, Inc. Quoted:

Why Use Silicon Carbide (SiC) Carrier Wafer?

Silicon Carbine (SiC) excellent surface flatness and thermal conductivity make them superior to sapphire and glass. Silicon can easily be bonded onto the SiC.

Why Use Sapphire as a Wafer Carrier?

Sapphire wafer have anisotropic, rhombohedral crystals form of Aluminum Oxide.

UniversityWafer, Inc. sapphire wafers carriers have be fabricated to have multiple holes.  The perforations assist in the backside thinning process of Compound Semiconductor wafers for Gallium Arsenide (GaAs), Indium Phosphide (InP), Silicon (Si) and other semiconductors.
Anisotropic single crystal materials thermal expansion is very limited and sapphire’s hardness vary significantly by the substrate’s orientation. But it should not matter much for most uses.

UniversityWafer, Inc and our partners have years of wafer carrier experience

So Why Use Sapphire for your Wafer Carrier?

  1. Chemicals cannot penetrate Sapphire’s surface.
  2. Zero-degree sapphire wafer carriers are a good coefficient of thermal expansion match to Gallium Arsenide (GaAs).
  3. Holed wafer carriers can help improve the debonding process.

What Carrier Wafers are Used in Plasma Etch Systems?

Researcher asks:

What is the cost of the 8” diameter double-side polished sapphire, 1.25mm thick in quantities of 1 and 3. We use these as carriers in a plasma etch system.

UniversityWafer, Inc. Quoted:

Pls see below for the offer on required optical grade 8" 1.25mm thick sapphire wafer

8" C-plane<0001>+/-1° 1.25+/-0.05mm P/P Polished Optical grade

Pure round wafer,without flat cut and semi notch

Pricing : $ depends on quantity

Please reference #262951

Carrier Wafers Available List

Size(inch) Orientation Thickness Surface Remarks Wafer Grade Mini Order Qty.
4'' C-plane<0001>+/-1° 1.0+/-0.025mm P/E Epi polished  Prime 138pcs
6'' C-plane<0001>+/-1° 1.0+/-0.025mm P/E Epi polished  Prime 135pcs
             
8'' C-plane<0001>+/-1° 0.75+/-0.05mm P/E Epi polished  Prime 9pcs
C-plane<0001>+/-1° 1.25+/-0.05mm P/P Epi polished  Prime 16pcs
C-plane<0001>+/-1° 1.60+/-0.05mm P/E Epi polished  Prime 97pcs
C-plane<0001>+/-1° 3.00+/-0.05mm P/P Epi polished  Prime 5pcs
4'' SiC 1.0+/-0.025mm P/P Epi polished  Prime 23pcs
4'' SiC 2.0+/-0.025mm P/P Epi polished  Prime 1pcs
4~8'' Silicon >/=1.0mm P/E Epi polished  Prime 213pcs
Notice : 
1. Delivery : 1~6 weeks
2. Do custom Sapphire wafers upon request from 2'' ~ 12''
3. P/E : Single side polished 
4. P/P : Both sides polished
5. TBD by qty.: Pricing According to the quantity
6. Wafer Grade: Prime grade ,Optical grade

Sapphire Wafer Carrier

al203 carrier wafer

al203 single side polished carrier wafer