Order 12-Inch Silicon Carbide Wafers
UniversityWafer, Inc. supplies 12-inch (300mm) 4H-SiC wafers for advanced research in power electronics, RF, high-temperature devices, and semiconductor education. Both N-type conductive and HPSI semi-insulating substrates are available for device fabrication, epitaxy development, and pilot-line process work.
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N-Type and HPSI 4H-SiC available for device fabrication and epitaxy.
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Researchers choose 12-inch SiC wafers for:
- High-voltage MOSFET and diode development.
- Wide bandgap device fabrication for EV and aerospace applications.
- RF, mmWave, and microwave electronics research.
- Thermal management and high-temperature reliability studies.
- Scaling laboratory processes to 300mm-compatible toolsets.
We support single wafers, small lots, and custom specifications for universities, national labs, and industry.
Available Specifications
We offer a wide range of electrical and mechanical parameters to support various device architectures:
- 4H-SiC polytype with precise off-axis orientation.
- N-type (nitrogen) or HPSI high-resistivity material.
- Standard 300.0 ± 0.5 mm diameter.
- Typical thickness around 600–700 μm.
- Si-face CMP-polished surfaces for epitaxy.
- Low micropipe and dislocation densities to improve device yield.
- Front and back surface options depending on process needs.
Fast Quotes & Custom Orders
If you do not see the exact parameters required for your research, our team can help source specialty wafers or provide close alternatives. We work with students, professors, and engineers needing reliable wide bandgap substrates for high-performance research.
For faster assistance, please include:
- Polytype (4H-SiC)
- Doping (N-type or HPSI)
- Orientation and off-cut
- Thickness
- Resistivity range
- Epitaxy needs (if any)
12-Inch Silicon Carbide Wafers (300mm 4H-SiC Substrates)
UniversityWafer, Inc. helps researchers and device engineers transition to 300mm (12-inch) silicon carbide wafers for next-generation power, RF, and high-temperature electronics. These large-area 4H-SiC substrates support higher throughput, larger die sizes, and scalable pilot-line production for wide bandgap device development.
On this page you will find typical specifications for N-type conductive and high-purity semi-insulating (HPSI) 12-inch SiC wafers, including polytype, orientation, resistivity control, crystal quality, and front/back surface preparation. Use these data as a starting point for your process development, then contact us with your exact requirements.
Why 12-Inch Silicon Carbide Wafers?
Moving to 12-inch (300mm) SiC enables fabs and research labs to align wide bandgap process flows with mainstream silicon tools. Larger wafers:
- Increase the total number of die per wafer for power MOSFETs, diodes, and RF devices.
- Reduce cost per die once processes are stabilized and yields improve.
- Allow more statistically meaningful process studies on a single wafer run.
- Make it easier to integrate SiC unit processes into 300mm silicon pilot lines.
For universities, national labs, and industrial R&D groups, 12-inch SiC wafers provide a platform to prototype the same device architectures that will later scale into volume production.
12-Inch N-Type 4H-SiC Substrates
N-type 4H-SiC wafers are used for conductive device substrates in applications such as:
- High-voltage power MOSFETs and Schottky diodes for EV inverters and chargers.
- Industrial motor drives and high-efficiency power supplies.
- High-frequency, high-power RF and microwave amplifiers.
Typical 12-inch N-type SiC substrates are:
- Polytype: 4H-SiC with controlled off-axis orientation.
- Dopant: Nitrogen (N-type) with resistivity measured over the central 8-inch area.
- Diameter: 300.0 ± 0.5 mm with defined notch orientation and depth.
- Thickness: Representative values around 600–700 µm for mechanical stability.
- Front surface: Si-face, ground and CMP-polished for epitaxial growth.
- Back surface: C-face, ground and polished to support good thermal and electrical contact.
Crystal quality metrics such as micropipe density, dislocation densities (TSD, BPD, TED), and surface defect specifications (scratches, particles, pits, polytype inclusions) are tightly controlled to support high-yield device fabrication.
The following table summarizes typical 12-inch N-type 4H-SiC substrate specifications:
| Item | Unit | Dummy Grade | Production Grade |
|---|---|---|---|
| Polytype | -- | 4H | 4H |
| Surface orientation | ° | 4° toward [11-20] ± 0.5° | |
| Dopant | -- | N-type (Nitrogen) | |
| Resistivity | Ω·cm | Measured over the central 8-inch area | |
| Diameter | mm | 300.0 ± 0.5 | |
| Thickness | μm | 600 ± 50 / 700 ± 50 | |
| Notch orientation | ° | <1-100> ± 5° | |
| Notch depth | mm | 1 – 1.25 | |
| TTV | μm | NA | NA |
| Bow | μm | NA | NA |
| Warp | μm | NA | NA |
| Micropipe density | ea/cm² | NA | < 10; no large-area aggregation of microtubes |
| Visible carbon inclusions | % | NA | NA |
| Metal impurities | atoms/cm² | NA | NA |
| TSD | ea/cm² | NA | NA |
| BPD | ea/cm² | NA | NA |
| TED | ea/cm² | NA | NA |
| SF (2 mm × 2 mm) | % | NA | NA |
| TUA (2 mm × 2 mm) | % | NA | NA |
| Front side | -- | Si-face | |
| Front surface finish | -- | Grinding, Si-face CMP | |
| Particles | ea/wafer | NA | NA |
| Scratches (front) | ea/mm | NA | NA |
| Orange peel / pits / stains / striations / cracks / contamination / pinholes | -- | NA | None; pinholes allowed only within 3 mm edge exclusion; no cracks |
| Edge chips / indents (front) | -- | NA | Edge chips with depth < 1 mm allowed |
| Polytype areas (front) | -- | < 5%, 3 mm edge exclusion | None |
| Front roughness | nm | NA | NA |
| Front laser marking | -- | None | None |
| Back finish | -- | Grinding, C-face polished | |
| Scratches (back) | ea/mm | NA | NA |
| Edge chips / indents (back) | -- | NA | NA |
| Back roughness | nm | NA | NA |
| Back laser marking | -- | On C-face, based on customers' needs | |
| Edge | -- | No chamfer | Chamfer |
| Packaging | -- | Multi/single-wafer cassette, vacuum-sealed in aluminum foil bag | |
12-Inch HPSI 4H-SiC Substrates
High-purity semi-insulating (HPSI) 4H-SiC wafers are used wherever the substrate must have extremely high resistivity and minimal parasitic conduction, for example:
- RF and microwave monolithic integrated circuits (MMICs).
- High-frequency power amplifiers and low-loss passive components.
- Isolation structures, sensors, and experimental device architectures.
HPSI 12-inch wafers typically feature:
- Polytype: 4H-SiC with near-zero off-cut (<0001> orientation).
- Doping: Nominally undoped with very high resistivity over the central wafer area.
- Diameter and thickness: 300 mm class, similar to conductive wafers to simplify handling.
- Front surface: Si-face CMP-polished for low-defect epitaxial growth.
- Back surface: C-face polished to support metallization and mounting.
Defect and contamination limits are set to minimize RF loss and variability, including strict control of micropipes, polytype inclusions, and surface particles.
The next table summarizes representative 12-inch HPSI 4H-SiC substrate parameters:
| Item | Unit | Production Grade |
|---|---|---|
| Polytype | -- | 4H |
| Surface orientation | ° | <0001> ± 0.2° |
| Dopant | -- | None (HPSI) |
| Resistivity | Ω·cm | Measured over the central 8-inch area |
| Diameter | mm | 300.0 ± 0.5 |
| Thickness | μm | 600 ± 50 / 700 ± 50 |
| Notch orientation | ° | <1-100> ± 5° |
| Notch depth | mm | 1 – 1.25 |
| TTV | μm | NA |
| Bow | μm | NA |
| Warp | μm | NA |
| Micropipe density | ea/cm² | < 5; no large-area aggregation of microtubes |
| Visible carbon inclusions | % | NA |
| Metal impurities | atoms/cm² | NA |
| TUA (2 mm × 2 mm) | % | NA |
| Front side | -- | Si-face |
| Surface finish (front) | -- | Si-face CMP |
| Particles | ea/wafer | NA |
| Scratches (front) | ea/mm | NA |
| Orange peel / pits / stains / striations / cracks / contamination / pinholes | -- | NA |
| Edge chips / indents (front) | -- | NA |
| Polytype areas (front) | -- | None |
| Front roughness | nm | NA |
| Front laser marking | -- | None |
| Back finish | -- | C-face polished |
| Scratches (back) | ea/mm | NA |
| Edge chips / indents (back) | -- | NA |
| Back roughness | nm | NA |
| Back laser marking | -- | On C-face, based on customers' needs |
| Edge | -- | Chamfer |
| Packaging | -- | Multi/single-wafer cassette, vacuum-sealed in aluminum foil bag |
Applications in Research and Education
UniversityWafer, Inc. works with both industrial and academic users who are exploring wide bandgap devices for:
- Electric vehicles, charging infrastructure, and on-board power conversion.
- Renewable energy inverters, energy storage interfaces, and smart grid hardware.
- High-frequency communications, radar, and aerospace electronics.
We support single-wafer evaluation, small lots for process development, and larger quantities for pilot lines and teaching labs. If you do not see your exact specification listed, we can often help source or suggest close alternates.
To receive pricing, lead time, and availability on 12-inch N-type or HPSI SiC wafers, please use our online store or request a quote.