What are silicon on insulator SOI wafers used for?

Silicon on insulator SOI wafers are used for silicon photonics, silicon waveguides, grating couplers, MEMS, RF devices, microelectronics, image sensors, low-power electronics, and advanced semiconductor research.

What is the buried oxide layer in an SOI wafer?

The buried oxide layer, often called BOX, is the insulating oxide layer between the top silicon device layer and the handle silicon wafer. It helps reduce electrical losses, leakage current, and parasitic capacitance.

What SOI wafer specifications should researchers include in a quote request?

Researchers should include wafer diameter, device layer thickness, buried oxide thickness, handle wafer thickness, orientation, dopant type, resistivity, polish, grade, quantity, and whether whole wafers or diced pieces are needed.

What is the difference between bonded SOI and SIMOX SOI?

Bonded SOI wafers are typically made by bonding two silicon wafers with an oxide layer between them, while SIMOX SOI wafers are formed by implanting oxygen into silicon and annealing to create a buried oxide layer.

Silicon on Insulator SOI Wafers

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Silicon-on-Insulator for fabricating Silicon Waveguides

Researchers have been using the following specs to fabricate the following SOI wafers as there is no additional absorbtion loss due to doping in integrated photonics work.

Silicon Waveguides
Grating Couplers
Integrated Photonic Components

SOI Item #3536
25mm X 25mm P/B <100> 10-20 ohm-cm 725um SSP Prime

Other wafer diameters and dimensions are also available

UniversityWafer, Inc's silicon-on-insulator (SOI) wafers , can be used the following electronics applications:

ultra-low power signal processing
wireless connectivity
power, image sensors and silicon photonics applications
radio-frequency silicon-on-insulator (RF-SOI) substrates
ultra-low power connectivity RF

UniversityWafer, Inc. can provide researchers with a wide range of engineered substrates including fast growing segments like automotive, AI-IoT (AIoT) and 5G.

Bonded Silicon-on-Insulator for Nanomaterials Research

Researchers have used the following SOI wafer item to research nanomaterials (applied physics) for quantum/photonic computation.

Si Item #3213
150mm P/B <100> 675um SSP
Device Layer: 2um Device Res 17-23 ohm-cm
Oxide: 0.5um
Handle Layer: 675um Res 4.8-7.2 ohm-cm

SOI Wafer for Silicon Waveguides

Research clients have used our Silicon-on-Insulator wafers for their silicon waveguide research.

SOI Item #3536
25mm X 25mm P/B <100> 10-20 ohm-cm 725um SSP Prime
SOI square, Device: 220nm, BOX: 3000nm Handle thick: 725+/-15um, TTV: <1um

Silicon on Insulator Wafers

We specialize in Small quantities orders!

You need to increase your semiconductor device’s performance by decreasing electrical losses. SOI wafers is the solution. SOI reduces the power required and heat that’s generated, thus increasing the device’s efficiency and speed. SOI insulation, or oxide layer, thickness depends on the application. Thermal oxide from a few nanometers thick to many microns can be used in microelectronics as it reduces short-channel effects. Silicon on insulator wafers operate at lower temperature to doping. Higher device yield can be had because of SOI’s higher density.
SOI applications include

Silicon Photonics
Microelectronic Devices
Radio Frequency (RF) Devices

Expensive Soitec SOI SOITEC SOI Wafers and Simox SOI wafers DICED into small and affordable pieces!

Bonded SOI Wafers made to order in small quantiles and short lead times.

We work with several SOI manufacturers to provide small quantities of SOI to you. Whole wafers and diced pieces available at a deep discount

For example we have a potential order for 50 of the following:

100mm P/B (100) 500um 10-20 ohm-cm Prime Grade
Device 340nm
Oxide 1,000nm

The manufacturer's minimum quantity is 50 wafers. But you only need say 1-3 wafers. We could potential buy 50 and sell you just a few at a very reasonable cost.

Other diameters such as 150mm is also possible. IF this interests you, please let us know. Or fill out the form below and let us know which specs you need!

Below are just some of our Thin Device Layer SOI Inventory

ID	Diameter	Type	Dopant	Orientation	Resistivity (Ohm-cm)	Thickness	Polish	Grade	Description
3536	25mm X 25mm	P	B	<100>	10–20	725um	SSP	Prime	SOI square wafer. Device Layer: 220nm BOX Layer: 3000nm Handle Thickness: 725 +/-15um TTV: <1um
3308	100mm	P	B	<100>	1000–2000	483um	SSP	Prime	BOX Thickness: 2.2um Device Layer: 27.5um Handle Resistivity: 1000–2000 ohm-cm Device Resistivity: 0.004–0.006 ohm-cm
3213	150mm	P	B	<100>	10–20	675um	SSP	Test	Device Layer: 2um Oxide Layer: 0.5um Handle Layer: 675um Device Resistivity: 17–23 ohm-cm Handle Resistivity: 4.8–7.2 ohm-cm
3381	150mm	P	B	<100>	10–20	675um	SSP	Prime	SOI Device Layer: 220nm BOX Layer: 2um MFR PN: SMB-6P675-2-0.22
2551	200mm	P	B	<100>	~1–20	725um	SSP	Prime	Device Thickness: 70nm Oxide Thickness: 2000nm
3523	200mm	P	B	<100>	10–20	725um	SSP	Prime	Device Layer: 220nm BOX Layer: 3000nm

SIMOX Silicon-on-Insulator SOI

We have the following thin device layer SOI available in small and large quantities. Please fill out the form for an immediate quote.

100mm SOI WAFERS

DEVICE TOP LAYER:
Diameter: 100±0.2mm
Type/Dopant: P/B
Orientation: (1-0-0)±0.5°
Thickness: 220±10nm
Resistivity: 8.5-11.5 ohm-cm
Finish: Frontside Polished

BURIED THERMAL OXIDE:
Thickness: 3μm±5%

HANDLE LAYER:
Diameter: 100±0.2mm
Type/Dopant: P/B
Orientation: (1-0-0)±0.5°
Thickness: 725±15um
Resistivity: ≥750 ohm-cm
Notch: Semi Standard
Back Finish: Etched + Oxide

Overall Wafer:
Edge exclusion: ≤5mm
TTV: ≤5μm, Warp: ≤50μm, Bow: ≤50μm

150mm SOI WAFERS

DEVICE TOP LAYER:
Diameter: 150±0.5mm
Type/Dopant: P/B
Orientation: (1-0-0)±0.5°
Thickness: 220±10nm
Resistivity: 8.5-11.5 ohm-cm
Finish: Frontside Polished

BURIED THERMAL OXIDE:
Thickness: 3μm±5%

HANDLE LAYER:
Diameter: 150±0.5mm
Type/Dopant: P/B
Orientation: (1-0-0)±0.5°
Thickness: 725±15um
Resistivity: ≥750 ohm-cm
Notch: Semi Standard
Back Finish: Etched + Oxide

Overall Wafer:
Edge exclusion: ≤5mm
TTV: ≤5μm, Warp: ≤50μm, Bow: ≤50μm

Silicon on Insulator (SOI) For University Students