We have a large selection of silicon substrates with surface roughness values as low as Ra = 1A.
Client asks
I was wondering if you had n-doped (or p-doped) silicon wafer with very low surface roughness, say Ra = 1A or less.
UniversityWafer Replies
We can meet your demand
3”, P(100), 1-10 ohm-cm n-doped, SSP, 380um, 25 wafers Ra = 1A or less (other diameters and specs available upon request.)
The Si wafer surface roughness is guaranteed by repetition of the chemical-mechanical-planarization (CMP) polishing processSi wafer surface roughness is guaranteed by repetition of the chemical-mechanical-planarization (CMP) polishing processSi wafer surface roughness is guaranteed by repetition of the chemical-mechanical-planarization (CMP) polishing process not by any measurement, which would be destructive. For the polished side of the wafers the normal roughness value is <0.5nm.
The CofC doesn't mention any surface roughness measurements data as the roughness is guaranteed by repetition of the chemical-mechanical-planarization (CMP) polishing process.
I hope this helps.