Epitaxially Grown Devices 

What Are Epitaxially Grown Devices?

Epitaxially grown devices are semiconductor structures in which crystalline layers are deposited with atomic precision on single-crystal substrates so the film matches the substrate’s lattice orientation. This enables high-performance transistors, lasers, photonic components, detectors, and solar cells. UniversityWafer supplies MOCVD and MBE epitaxial wafers and device templates for R&D and pilot production.

Epitaxial Growth Methods

• Metal-Organic CVD (MOCVD): High throughput and excellent uniformity for III–V / III–N compounds (GaAs/AlGaAs, InP/InGaAs(P), GaN/AlGaN/InGaN on sapphire/SiC/Si). Great for LEDs, µLEDs, HEMTs, and production photonics.
• Molecular Beam Epitaxy (MBE): Ultra-clean UHV process with atomic-layer precision and abrupt interfaces. Ideal for quantum wells, superlattices, tunnel junctions, detectors, and research lasers.
• Selectives & Variants: Selective-area epitaxy (SAE), epitaxial lateral overgrowth (ELOG), and pendeo-epitaxy to reduce threading dislocations on mismatched substrates (e.g., GaN on Si).

During the growth phase, it is necessary to use controlled high growth rates to suppress dopant redistribution and maintain abrupt interfaces. Rapid epitaxial deposition minimizes impurity diffusion between layers and ensures a consistent doping profile across the wafer. Furthermore, keeping the thickness of each epitaxial layer within ±5% of the target value improves structural uniformity and surface flatness. A stable epitaxial film requires the continuity of crystal planes across the interface—possible only when the substrate surface is free of distortion or step bunching. Careful temperature control during nucleation and ramp-up stages also helps reduce surface roughening, which directly affects optical and electrical performance.

Equally important is maintaining thermal equilibrium and gas-phase composition throughout the reactor. Variations in temperature or precursor flow can lead to strain gradients or lattice mismatch, especially in multi-material stacks such as AlGaN/GaN or InGaAsP/InP. By optimizing the V/III ratio, chamber pressure, and substrate rotation speed, the resulting epitaxial layers achieve excellent compositional uniformity and low defect density. The precise control of these parameters allows researchers to produce epitaxial films suitable for quantum wells, heterojunction bipolar transistors (HBTs), multijunction solar cells, and high-electron-mobility transistors (HEMTs).

Material Systems & Example Stacks

• GaN / AlGaN / InGaN: HEMTs (UID GaN channel + AlGaN barrier ± p-GaN gate), LEDs/µLEDs (InGaN MQWs with EBL).
• GaAs / AlGaAs / InGaAs: HBTs; VCSEL/edge-emit lasers (DBR + MQW active + claddings).
• InP / InGaAs(P): High-speed photodiodes/APDs and telecom lasers at 1.3–1.55 μm.
• Ge / GaInP / GaAs (MJ Solar): Metamorphic buffers + tunnel junctions on Ge for multijunction cells >30%.
• Si / SiGe: Strained-Si / SiGe HBTs and photonic-integrated platforms; Ge-on-Si for IR detectors.

Defect Management & Strain Engineering

• Buffers: Low-temp nucleation, step-graded or superlattice buffers to accommodate lattice/CTE mismatch.
• Lateral techniques: ELOG / pendeo-epitaxy to block threading dislocations and improve IQE & breakdown.
• Metamorphic growth: Composition grading (e.g., InGaAs on GaAs) with dislocation filters.
• Polar/Non-polar facets: GaN c-plane vs semi/non-polar orientations to manage piezoelectric fields in MQWs.

Applications

• RF & Power: GaN/AlGaN HEMTs, p-GaN gate HEMTs on Si, SiC, or sapphire; GaN power diodes.
• Optoelectronics: VCSELs and edge-emitters on GaAs/InP; µLED/LED on GaN for displays and illumination.
• Detectors & Imaging: InGaAs photodiodes & APDs (InP); IR detectors on GaSb/GaAs systems.
• Photonics & Si Integration: III–V-on-Si laser/receiver templates; Si/SiGe for RF and PICs.
• Solar: GaInP/GaAs/Ge multijunction stacks with tunnel junctions and graded buffers.

Metrology & Typical Targets

• HRXRD / RSM: composition, strain, relaxation; PL/EL: radiative efficiency & wavelength.
• AFM: RMS roughness of epi surfaces/MQW caps; TEM/SEM: interface abruptness & defect review.
• Electrical: Hall/ECV for carrier density & mobility; sheet R of doped/contact layers.
• Uniformity maps: thickness, composition, and emission uniformity across wafer.

Reliability & Processing Notes

• Thermal budgets: Cap layers and barrier design chosen for downstream anneals/ohmics.
• Surface prep: Oxide desorption / nitridation states (MBE) or pre-bake recipes (MOCVD) documented per lot.
• Contamination control: Low oxygen/carbon background, tool history, and chamber conditioning recorded.

Custom Stacks & Substrates

• Define materials, thicknesses, and doping (n/p) with MQW periods or superlattice details.
• Choose buffers (graded, AlN/AlGaN, superlattice) and dislocation-filter strategies.
• Substrates: GaAs, InP, GaN/SiC, sapphire, Ge, and Si/SiGe (typ. 2–6″; select up to 8″).

Quote Checklist

• Device type & target performance (e.g., wavelength, f_T, BV, R_on, responsivity).
• Substrate (material, diameter, orientation) and desired uniformity/defect targets.
• Layer stack (materials, thickness, doping), cap/barrier choices, and buffer strategy.
• Documentation needed (XRD, PL, AFM, maps, certs) and quantity (pieces/lot).