UniversityWafer provides silicon wafer dicing services for semiconductor research, MEMS, photonics, sensors, thin-film applications, and device development. We can help researchers convert full wafers into custom dies, chips, squares, rectangles, and coupons based on required dimensions, substrate specifications, tolerances, surface conditions, and packaging requirements.
UniversityWafer provides custom silicon wafer dicing services for researchers, engineers, universities, laboratories, and semiconductor companies that need full wafers converted into smaller dies, chips, squares, rectangles, or coupons.
Dicing projects can be specified by wafer diameter, thickness, crystal orientation, resistivity, surface finish, die dimensions, dimensional tolerance, quantity, and packaging requirements. Starting substrates may include intrinsic or doped silicon, high-resistivity material, oxide-coated wafers, and double-side polished silicon wafers .
Depending on the project requirements, finished pieces may also require tape mounting, individual handling, protective packaging, or wafer-cassette storage. Providing the intended application and complete specifications helps determine the appropriate dicing and handling approach.
One university Ph.D. researcher requested high-resistivity diced silicon wafers for spectroscopy research. The project required small silicon dies with tightly defined material specifications.
The researcher requested undoped silicon wafers diced into 10 mm × 10 mm pieces.
The finished silicon dies were intended for positron annihilation spectroscopy .
Reference inquiry #270386 for example specifications and pricing.
For the most accurate quote, include the starting wafer material, wafer diameter and thickness, requested die dimensions, dimensional tolerance, surface finish, resistivity, crystal orientation, quantity, and any special cleaning or packaging requirements.
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Dicing is only one part of preparing silicon dies for research. Surface cleanliness, handling, storage, and packaging can also be important when the starting material has demanding electrical or surface specifications.
A senior research and development physicist contacted UniversityWafer about dicing and packaging RCA-cleaned silicon wafers while reducing the risk of contamination during storage and shipment.
Example custom dicing specification:
Item IS92b — Quantity: 4 wafers
This example demonstrates how a wafer dicing project may involve more than die dimensions alone. Electrical properties, crystal orientation, surface roughness, polishing, dimensional tolerance, handling, and packaging may all be important to the final application.
Reference inquiry #23278 for example specifications and pricing.
Silicon wafer dicing is the process of cutting a full silicon wafer into smaller dies, chips, squares, rectangles, or coupons. UniversityWafer works with researchers, engineers, laboratories, and semiconductor companies that require custom diced substrates for device fabrication, testing, thin-film deposition, MEMS, photonics, sensors, spectroscopy, and materials research.
Dicing requirements can vary significantly depending on wafer diameter, thickness, crystal orientation, surface finish, coatings, resistivity, requested die size, tolerance, and final application. Providing complete specifications helps determine the most appropriate cutting and handling approach.
Wafer dicing, also called wafer singulation, separates a wafer into individual pieces after crystal growth, polishing, coating, lithography, deposition, or other processing steps. The cutting approach depends on the material and the condition of the wafer before dicing.
Important considerations include die dimensions, kerf width, edge quality, wafer thickness, surface coatings, patterned device areas, particle control, mechanical stress, and the risk of chipping or cracking.
Mechanical blade dicing uses a precision spindle and thin diamond-embedded blade to cut along predefined dicing streets. It is widely used for silicon because it can provide repeatable cuts and controlled die dimensions across many standard wafer thicknesses.
Blade selection, spindle speed, feed rate, coolant flow, wafer mounting, and cut depth all influence edge quality and dimensional accuracy. Mechanical dicing is commonly considered for silicon coupons, sensor substrates, test pieces, rectangular dies, and research samples.
Depending on project requirements and available processing options, laser-based dicing may be considered for specialized applications.
Laser wafer dicing uses focused laser energy to create a separation path through or within the substrate. Because there is no physical saw blade in contact with the wafer, laser-based processes may be useful for thin substrates, narrow cutting streets, fragile structures, or applications requiring specialized geometries.
Wavelength, pulse duration, laser power, scanning speed, wafer thickness, coatings, metallization, and dielectric layers can affect kerf width, heat input, debris generation, and final edge quality.
Other wafer singulation techniques used in the semiconductor industry include scribe-and-break processing, stealth dicing, thermal laser separation, and plasma dicing. The suitability of each method depends on wafer material, thickness, device geometry, required edge quality, allowable thermal exposure, and contamination requirements.
These methods are generally selected for specialized applications where narrow separation paths, reduced mechanical contact, low particle generation, or non-standard die geometries are important.
Custom dicing may be required for many types of silicon substrates, including:
Custom diced silicon can be supplied as squares, rectangles, dies, chips, or coupons. Final dimensions and tolerances depend on the starting wafer, thickness, cutting method, surface condition, and application.
When requesting a quote, specify the desired finished die dimensions and any important requirements for dimensional tolerance, edge condition, kerf width, orientation, or usable surface area.
To receive an accurate quote for silicon wafer dicing services, provide as many of the following details as possible:
Post-dicing handling can be especially important for polished, high-resistivity, coated, or device-grade silicon. Depending on the project, requirements may include tape mounting, individual die handling, wafer-cassette packaging, protective containers, or controlled cleaning.
For projects requiring cleaner silicon surfaces, review our RCA wafer cleaning services . Packaging and handling requirements should be specified when requesting a quote so the finished pieces can be prepared appropriately.
Custom diced silicon dies and coupons are used across semiconductor, engineering, and research applications, including:
Customers looking for a finished silicon piece may also want to review our diced silicon wafers page. This wafer dicing page focuses primarily on the cutting and singulation service, while the diced silicon wafer page focuses on finished silicon dies, chips, and coupons supplied to customer specifications.
UniversityWafer can help with custom silicon wafer dicing requirements for research, prototyping, device development, testing, and semiconductor processing. Send us your wafer specifications, requested die dimensions, tolerances, quantity, and packaging requirements so we can review the project.