Boron vs Arsenic Doping in Silicon Wafers 

Boron and arsenic are two of the most common dopants used to “tune” silicon wafers for U.S. research and manufacturing. This guide explains how each dopant changes carrier type (p-type vs n-type), how doping links to resistivity and diffusion, and how practical wafer sizes, from 25.4mm samples to 150mm pilot wafers, fit real process workflows.

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Why Doping Matters in Silicon Wafers

In semiconductor process design, wafers are rarely “pure silicon.” Small dopant concentrations can determine whether a device behaves like a sensor element, a power structure, or a logic component. Typical lightly doped substrates often fall in the ~1×1013 to 1×1015 atoms/cm3 range, where the goal is predictable electrical behavior without compromising process control.

Core Difference: Boron vs Arsenic

  • Boron: Creates p-type silicon (holes are the majority carriers).
  • Arsenic: Creates n-type silicon (electrons are the majority carriers).

That single choice affects how junctions form, how resistivity is specified, and how your diffusion and thermal budgets behave in the fab.

P-Type vs N-Type: Practical Engineering View

Boron-doped p-type wafers are widely used in U.S. research and mature-node workflows because they are flexible and common in sensor, solar, and analog process development. Arsenic-doped n-type wafers are often chosen where you need very low resistivity paths and sharp, heavily doped n-regions in power or high-speed device flows.

How Doping Links to Resistivity

Most wafer datasheets describe doping through carrier type and either resistivity or a target concentration range. For heavily doped arsenic wafers, concentrations around 1×1019–3×1019 atoms/cm3 are commonly used to reach very low resistivities (on the order of milli-ohm-cm), supporting high-current and low-loss paths.

Boron-doped wafers cover a broad spectrum as well—often selected based on whether the project needs higher resistivity (sensors/RF) or moderate resistivity (mainstream device structures).

Diffusion Behavior: Why Thermal Budgets Differ

A key manufacturing difference is diffusion: boron typically diffuses faster than arsenic under typical diffusion conditions. That makes boron convenient for forming p-type regions, but it also requires careful control to avoid over-diffusion and loss of junction sharpness.

Arsenic generally diffuses more slowly, which helps create sharper profiles, but process flows may need to account for interactions between dopants during opposing diffusion steps.

Choosing Wafer Diameter for Boron or Arsenic Projects

In the U.S., dopant choice often tracks with diameter and project maturity. Many teams begin with small wafers (like 25.4mm) for early experiments, then move to 3" and 4" sizes to validate recipes in realistic lab tooling. For pilot-scale work, 150mm wafers can bridge R&D into mature production environments in power and specialty analog.

Diameter Common U.S. Use Typical Doping Direction
25.4mm (1") Fundamental research, spectroscopy Undoped or light B/As for experiments
3" (76.2mm) Microfluidics, SEM studies, early device R&D Boron p-type or arsenic n-type
4" (100mm) University lines, pilot CMOS, MEMS P-type B and N-type As/P across many specs
150mm (6") Power, RF, specialty analog pilot lines High-uniformity B and As for scaled flows

US Sourcing, Tariffs, and Doping Strategy

Doping decisions can also affect procurement strategy. Some teams prefer to buy fully doped wafers from U.S.-based inventory to avoid long lead times, while others import undoped CZ/FZ material and perform implantation or diffusion in-house to reduce exposure to tariff volatility on finished doped substrates. Knowing how boron vs arsenic behaves makes it easier to decide where each process step should happen.

Conclusion

Boron and arsenic are foundational dopants in silicon wafer engineering. Boron supports p-type behavior and is widely used in sensors and solar-related flows, while arsenic supports sharp, low-resistance n-type regions needed for high-current and high-speed devices. By matching dopant choice to resistivity targets, thermal budgets, wafer diameter, and sourcing strategy, you can build a wafer spec that works for both experiments today and scale-up tomorrow.