Silicon Wafer Doping Techniques Compared: P-Type, N-Type, Undoped, and Process Choices Explained 

Fundamentals of Silicon Wafer Doping

Doping is the intentional introduction of impurity atoms into silicon to control carrier type, resistivity, and junction behavior. By selecting dopant species and concentration, engineers tune conductivity and electrical performance at a very fine scale.

These decisions influence leakage, breakdown voltage, and compatibility with fabrication steps such as diffusion, implantation, and anisotropic etching. Comparing p-type, n-type, and undoped wafers early helps avoid costly process changes later.

P-Type Silicon: Boron-Doped Wafers

P-type silicon is formed by introducing boron into the lattice, creating holes as the majority carriers. It is widely used in sensors, photovoltaic cells, and MEMS devices.

Boron-doped wafers are available across a broad resistivity range. Low-resistivity wafers support high conductivity, while higher-resistivity options are used when leakage must be controlled. Pricing and availability vary with diameter, resistivity, and surface finish.

N-Type Silicon: Phosphorus, Arsenic, and Antimony

N-type silicon is created using donor dopants such as phosphorus, arsenic, or antimony. These dopants supply free electrons, making n-type wafers essential for many CMOS and power-device structures.

Phosphorus is commonly used due to ease of processing and faster diffusion, while arsenic and antimony diffuse more slowly and allow sharper junction control. Dopant selection depends on whether deep or shallow junctions are required.

Undoped (Intrinsic) Silicon Compared to Doped Wafers

Undoped silicon wafers contain only background impurity levels and exhibit very high resistivity. While not suitable for active devices on their own, they are often used as starting substrates for custom doping.

Intrinsic silicon is especially useful for anisotropic wet etching, where heavily doped regions may slow or stop etching. This makes undoped wafers a strong choice for MEMS structures and geometry-controlled cavities.

Doping, Etching, and Surface Finish

Doping level affects how silicon responds to processes such as KOH or TMAH etching. Heavily boron-doped regions can act as etch stops, while undoped silicon etches more uniformly.

Surface finish also matters. Double-side polished (DSP) wafers are preferred when thickness uniformity and double-sided processing are required, while single-side polished (SSP) wafers are sufficient for many standard flows.

Doping choices interact with base substrate types such as CZ, FZ, SOI, and epitaxial wafers. FZ wafers offer higher purity and resistivity, while SOI and epitaxial structures allow precise control of doped device layers.

Silicon wafers are available from 50.8 mm up to 300 mm diameters. As wafer size increases, maintaining uniform doping becomes more challenging, making process control increasingly important.

Key Takeaways

• P-type silicon uses acceptor dopants (typically boron) and supports hole conduction.
• N-type silicon uses donor dopants (phosphorus, arsenic, or antimony) and supports electron conduction.
• Undoped silicon offers high resistivity and predictable etching behavior.
• Doping level, polishing, and substrate type all influence final device behavior.