What is Anisotropic Wet Etching?

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Silicon Used for Anisotropic Wet Etching

Wet etching is an important step in semiconductor manufacturing and microfluidic micromachines that require microscale properties to optimize performance and generate laminar flow systems that are close - impossible to obtain on a macro scale.

Researchers have used the following wafer spec.

Si Item #2357
100mm P/B <110> 1-10 ohm-cm 500um SSP Prime Grade

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Anisotropic Wet Etching

Wet etching is an important step in semiconductor manufacturing and microfluidic micromachines that require microscale properties to optimize performance and generate laminar flow systems that are close - impossible to obtain on a macro scale. This article focuses on a method that can deliver high etching rates by using a process that uses a series of separate etching and deposition steps. This is in contrast to conventional etching processes, which use a purely alkaline solution. In addition, the method is required for high-quality, cost-effective microscale features that can only be achieved through separate etching, separation and processing steps. [Sources: 3, 4, 6]
Depending on the task, wet etching can be connected to a number of wet erasers, including a movable shield to protect workers from etching splashes. [Sources: 0]
If the etching is used to create a cavity in the material, the depth of the cavity can be controlled by etching time and known etching rate. The size of this compensation geometry depends heavily on the etching depth and its characteristic etching. If there is a high undercut rate in a floating structure, then the high etching rate is sufficient to form cavity grooves that are less than half the etching time and vice versa. [Sources: 3, 7, 8]
Finally, we propose a wave-conductor lattice coupler that can be realized with anisotropic wet etching technology. Figure 2 outlines the manufacturing steps used in the realization of the mesh couplings using the isotropic dry etching process. [Sources: 5]
The etching age is significant because it affects the roughness and morphology of the etching surface as well as the etching rate shown in the previous section. In sharp edge etching, the convex edges are protected by a mask layer with a very thin discontinuous photoresist coating, which does not protect the desired area of the copper from ion bombardment. However, the roughness of the wall is significantly reduced during the wet etching process and is comparable to the roughness of the surfaces and surfaces. [Sources: 0, 3, 5, 7]
Etching takes place in the plane of the silicon crystal, and the etching rate in this direction means that the direction is etched perpendicular to the edge. The etching rate depends on the concentration of the etching agent and its solution temperature, the choice of etching type used, as well as the temperature and direction of the surface roughness and surface morphology. In the case of anisotropic wet etching, it strongly influences the etching rate at a fixed etching temperature, as the chemical activity of the etching solution is induced by the additives and echantics. [Sources: 2, 3, 7]
This effect can allow a very high anisotropic etching, where the 111 planes act as stop-etching. By applying a laminar flow limit on both sides of the desired etched channel, a certain layer is protected from etching. Due to the ability to change the orientation of chemicals and silicon crystals, many different channel shapes can be etched simultaneously by changing their orientation. [Sources: 5, 6]
The AP is most effective when the high etching rate is achieved on smooth etching surfaces with exposed Al. Some additives can be modified, while others alter one or two of the etched properties. [Sources: 3]
Since wet etching is a purely chemical process, waveguides are produced with very little scattering loss, while the waveguides "side walls are determined by the silicon crystal plane, which ideally has no irregularities at the atomic level. Although we stress here that the microstructure used in wet anisotropic etching can be determined by taking into account the lateral undercutting angle of the etched side walls, the surface of a silicon wafer mask may not be completely determined. This determines the correct etching direction and the ability to control the etching rate. The silicon wafer mask defines where the etching can take place, as well as the size and shape of each layer. [Sources: 2, 5, 7]
The use of the terms anisotropy and plasma etching should not be confused when it comes to orientation - dependent etchings. Etchings that occur at different speeds and in different directions are either isotropic (i.e. they may have a lateral undercutting rate when etched downwards) or isotropic (depending on the orientation of a substrate in the crystalline plane). Plasma etches can be either isotropic and have laterally below average rates at their downward velocity, or both and have aniisotropic properties. If the orientation of the substrate does not influence how the etching agent is removed from the material, there is no difference between the two etching types, which are the same in both directions, which is the case with wet and ionic etchers. [Sources: 6, 8]
However, an increase in the concentration of IPA in the etching solution increases the rate of the etching reaction, which in turn leads to an anisotropic effect. Since isotropic etching is difficult to control precisely and hydrofluoric acid difficult to handle, it is no faster than anisotropic etching. [Sources: 1, 2]
The loss of propagation (tm) of polarization is 1.08 dB / cm, which suggests that the proposed wet wetting process can be used to produce polarization structures - insensitive waveguide structures. A manufacturing process based on anisotropic wet etching technology is intended to achieve low propagation losses and at the same time maintain the insensitivity of the polarization. Wet etching, in which a chemical is used to remove a layer of the wafer, becomes bedridden, but the ability of the etching system to do so depends on the amount of hydrofluoric acid in the solution and the number of layers used. [Sources: 5, 6, 8]


[0]: https://resources.pcb.cadence.com/blog/2020-isotropic-etching-to-anisotropic-etching-and-semiconductor-manufacturing

[1]: https://aip.scitation.org/doi/full/10.1063/1.5012125

[2]: https://www.modutek.com/isotropic-and-anisotropic-silicon-wet-etching-processes/

[3]: https://mnsl-journal.springeropen.com/articles/10.1186/s40486-021-00129-0

[4]: https://www.google.com/patents/US20040018734

[5]: https://www.frontiersin.org/articles/10.3389/fmats.2016.00010/full

[6]: https://openwetware.org/wiki/Wet_Etching_-_Eric_Ying

[7]: https://mnsl-journal.springeropen.com/articles/10.1186/s40486-015-0012-4

[8]: https://en.wikipedia.org/wiki/Etching_(microfabrication)