Silicon Wafers Based Layers & Porosification for Research

university wafer substrates

What is Porosification?

Porosification is a work that is not found in your dictionary. It is a term used in the semiconductor industry is a process to for extrusion‐porosification process which uses two main process functions including: thermophysical micromixing of gas‐liquid systems and porosification of the resulting foams which lead to porous powders after water removal. 

Learn About Si-Based Layers & Porosification!

Si Based Layers and Porosification

Silicon (Si) based porous materials from nano to macro-scale. Application include:

  • Electronics
  • Optoelectronics
  • Photonics
  • Chemical Sensors
  • Biosensors and more

Researchers have determined that porous silicon depends technological parameters of electro-chemical
etching and parameters of the semiconductor subject to treatment.


Silicon Based Layers Porosification

Porous silicon forming properties focus on the quality of porous silicon, including the anodising properties of the material and its formation properties. This focused chapter covers a wide range of qualitative properties in the form of a range of different materials and layers of silicon, including the formation of pores, the composition and structure of layers, and the chemical composition. Formation properties, it also closes some gaps in the literature in this field by giving an overview of some of its most important properties, such as the structure, composition, structure and composition of materials, its properties as a porous material and its potential for use in a variety of applications. [Sources: 4, 6]

With Novel Cell Design: How to cite articles, the book also includes a wide range of recent literature on porous silicon, providing a more comprehensive overview of the state of research and development in the development of porous silicon-based technologies and improving the quality of porous silicon-based devices. [Sources: 6, 8]

The oxide layer does not require porous silicon formation, but rather grows before the membrane can be realized, and the porous structural gradients with good photo-absorption capacity. A manufactured porous silicon layer will be demonstrated in a silicon-based optoelectronic device with a high-performance photovoltaic (PVD) system. [Sources: 0, 8, 10]

The same deep etching process can also be used for the use of a silicon-based passivation layer [12]. In particular, the deposition process influenced by parameters (it is known that deposition methods allow preferably the deposition of silicon layers on an industrial scale) can produce silicon layers. As for the silicon-based insulating layer, we use the same process as we can use for the use of silicon-based passive layers [12]. [Sources: 1, 2, 3]

The bottom-up approach to the realization of porous silicon is to capture the laser - derived silicon clusters in the form of a GaAs layer on a silicon substrate. Other methods are being explored, such as recycling gas as a substrate to transfer the semiconductor layer to silicon, but direct growth of silicon is currently the most promising approach. [Sources: 0, 9]

The porous silicon layer thus obtained is sensitive to water vapour and shows luminescence in the red part of the spectrum. As determined by TEM imaging, the monocrystalline silicon-containing layer has a much higher energy density than its porous counterpart. This can be achieved by creating a sequence of layers, according to the invention, in which the "porous silicon layer" [13] is essentially made up exclusively of silicon. [Sources: 0, 3, 5]

The silicon-based insulating layer described above [3] is a silicon oxide layer containing a number of silicon oxides, in particular those with values between 0 and 1. This layer can also be any layer that preferably has a high thermal conductivity and can be of the type described above. For improved heat transfer, the energy density of this silicon-based layer should be as low as possible, i.e. lower than that of its porous counterpart [4]. This is preferred to the silicone-based passivation layer (2) and is the preferred one for the use of high-temperature materials, low-temperature thermal conductivity materials. [Sources: 2]

Further, for example, this silicon layer - based on a diamond - may be doped with silicon, like carbon (DLC) layer, or a silicon oxide layer. [Sources: 2]

Such grids are useful in elevator technology and form the basis for a wide range of applications such as solar cells, wind turbines, solar panels and even solar cell technology. [Sources: 5]

The surface, which is about to be porosified, is the result of a physical process used to remove silicon atoms and synthesize a porous layer. It is assumed that during the hydrogenation step, the radical hydrogen plasma replaces the dangling bonds in the amorphous silicon layer with hydrogen radicals from the plasma. The H2 is then sucked off on the sample in a glow-out step and the silicon surface is depassivated. This localized melt leads to the generation of the preferred macroporous P - conductive p - conductivity of the material. [Sources: 0, 7]

For passivation, a silicon-based insulating layer (12) can be used, as described above. The silicon-based passive layer [12] can be embedded either with an amorphous silicon layer or with a non-porous silicon layer. This allows the formation of a single-layer silicon porosification process in which the silicon base layer and its insulating layer are identical, without distinction in p-conductivity. [Sources: 2]

By using a single cell configuration, acceptable porosity, thickness and uniformity can be achieved. This uniformity can also be achieved by using high-density plasma deposition [12]. [Sources: 0]

The application of the above deposition methods leads to the formation of a silicon-based insulating layer with a lattice structure similar to that of germanium containing layers [12]. The grating consists of a second monocrystalline silicon layer, oriented to its own layer, embedded in a thin, porous g-germanium layer, which in turn has pores [13]. [Sources: 2, 5]