rSubstrates for Anisotropic Etching

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Quick Specs (Typical R&D)

ParameterCommon Options
Diameter100–200 mm (Si); 2–4 in (quartz, sapphire, GaAs, SiC)
Orientation (Si)(100), (110), (111) with primary/secondary flats or notches
Thickness200–725 µm (Si); custom thinning/polishing available
SurfaceSSP/DSP; Ra ≤ 0.5 nm on prime faces (process dependent)
Films (masks)Thermal SiO2 (50–500 nm), LPCVD/PECVD SiN (50–300 nm)
CleanlinessRCA clean options; particle and metallic contamination control

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Design Checklist

  • Substrate & orientation: Select Si ⟨100⟩ for V-grooves; ⟨110⟩ for vertical sidewalls in specific layouts; ⟨111⟩ for slow-etch planes.
  • Feature alignment: Align mask to crystal axes (<110>, <100>) to limit undercut and preserve corners.
  • Masking layer: Choose SiO2/SiN thickness for KOH/TMAH endurance; add hard mask for long plasma etches.
  • Aspect ratio target: Set trench width and depth to match wet vs DRIE capability; plan release holes for stiction control.
  • Metrology: Include test coupons for etch rate, sidewall angle, and roughness (pre-qualify before full run).

Silicon Plane Outcomes (Wet Etch)

  • (100) wafers: Classic V-grooves; (111) planes act as stops → ~54.7° sidewalls to surface.
  • (110) wafers: Can expose vertical {111} sidewalls in properly aligned patterns.
  • (111) wafers: Very slow etch rate; useful as natural stop for depth control.

Masking & Compatibility

For KOH/TMAH, use thermal SiO2 or LPCVD SiN as primary masks; verify metal stack compatibility. For plasma chemistries (SF6, CF4, C4F8, Cl2/BCl3), combine photoresist with oxide/nitride hard masks for long etches and vertical profiles.

Ordering & Quotes

  1. Choose substrate, diameter, orientation, thickness, and surface (SSP/DSP).
  2. Specify films (thermal oxide/nitride) and target thicknesses for masks.
  3. Attach drawing with feature directions relative to flats/notch if wet etching.
  4. Request metrology (thickness, bow/warp, TTV, oxide/nitride ellipsometry) if needed.

What is Anisotropic Etching?

Anisotropic etching removes material at direction-dependent rates, producing sharp features and high aspect ratios. Unlike isotropic etching (uniform in all directions), anisotropy controls sidewall angle and undercut—critical for MEMS cavities, IC trenches, and microfluidic channels.

Anisotropic etching example: sharp vertical trenches etched into a silicon surface

Wet vs Dry (Plasma) Methods

  • Wet chemical (silicon): Alkaline etchants such as KOH and TMAH etch Si along specific crystal planes. Typical results on (100) wafers form V-grooves with ~54.7° sidewalls (to the surface), limited undercut, and smooth facets.
  • Dry etching (RIE/ICP/DRIE): Fluorine- or chlorine-based plasmas (e.g., SF6, CF4, C4F8, Cl2, BCl3) enable vertical profiles with passivation cycles (Bosch DRIE) for deep, narrow trenches and through-silicon vias.

Crystal-Plane Dependence (Silicon)

Etch rates follow crystallography: (110) > (100) > (111) in many wet systems, with (111) acting as a slow “etch stop,” defining wall angle and cavity shape. Accurate orientation (<100> vs <110>) and flat alignment determine final geometry.

Common Substrates

  • Silicon: Widely used; well-characterized wet (KOH/TMAH) and dry (RIE/DRIE) recipes; ideal for MEMS and IC features.
  • Fused Silica/Quartz & Glass: Etched mainly via RIE/ICP for microfluidics and optics where transparency and thermal stability matter.
  • Sapphire: High mechanical strength and thermal stability; common in LED and optics; processed with aggressive plasma chemistries.
  • GaAs: For RF/optoelectronic devices; anisotropic features via Cl2/BCl3/Ar plasmas and selective wet systems.
  • SiC: Exceptional thermal conductivity and hardness; etched with high-energy ICP (e.g., SF6/O2) for power/harsh-environment devices.

Applications

  • MEMS: V-grooves, diaphragms, cavities, comb drives, TSVs.
  • IC/Packaging: Shallow/deep trenches, release windows, wafer thinning.
  • Microfluidics/Optics: Channels, nozzles, gratings, waveguide structures.

Design & Tolerance Tips

  • Aspect ratio: Wet Si etches: typically ≤10:1; DRIE (Bosch) commonly 10–30:1 in R&D (process-dependent).
  • Sidewall angle: Wet (100) Si ≈54.7° to surface; DRIE near-vertical with periodic scallops (reduce via low-scallop recipes).
  • Masking: SiO2/SiN hard masks for wet etch; photoresist + hard masks for plasma endurance.
  • Roughness: Wet facets can be sub-10 nm RMS; DRIE scallops typically tens to hundreds of nm—polish or passivation may be needed.
  • Undercut control: Align features to crystal axes; use corner-compensation geometries in wet etches to preserve tips.

Safety & Compatibility

Handle KOH/TMAH and halogen plasmas with appropriate PPE and exhaust. Verify metal/oxide/nitride compatibility and avoid cross-contamination between GaAs/Si/SiC lines.