Glass Substrates for Research and Production

university wafer substrates

What Glass Substrate Do You Need?

I have a few questions about  (100 mm diameter 500um) BK7 substrates. I know this is an odd request but I’m looking for a glass substrate with only moderate UV transparency and that is preferably uncoated. 50-60% transmission ~313 nm being ideal, with good transparency (90%+) at longer wavelengths than 313 nm. 

Can you confirm:

  • If the transmission profile of BK7 is similar to the one from Thorlabs BK7 windows? See excel sheet attached, note: Thorlabs window is 10 mm thick. Thorlabs only goes to 2” dia., which is not wide enough, and 10 mm is too thick for my application.
  • If you have any thicker NK7 substrates? 1 - 4.5 mm would be ideal, but I could buy several 500 um ones and stack to reach an equivalent thickness for a quick test.
  • How fast is your standard shipping rate?
  • Unless you recommend another product with UV transparency better matched to my application, could you send a quote for qty = 10 BK7

UniversityWafer, Inc. Quoted:

The best option for you is our running H-K9L wafers,
please refer to the property list as attyached,
meanwhile, we do have one cassette(25pcs) package in hand, we can ship them out today if you will issue us order quickly.

Please reference #271331  for pricing.

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Glass Substrates and Semiconductor Applications

Whether you're a semiconductor manufacturing professional or a design engineer, what does a glass semiconductor look likeglass substrates are critical to your product's performance. They help maintain the conductive and thermal properties of silicon, so that your chip can run smoothly. In addition, they're durable and resistant to wear and tear.


Glass Substrate Surface roughness

Optical, electronic, and mechanical properties of dielectric materials are strongly influenced by their surface roughness. In addition, their acoustic scattering properties and anti-fouling capacity are also impacted by the roughness of their surfaces.

There is still a lack of awareness in the dielectric material community about this phenomenon. Most research has focused on materials on the nanometer to micrometer scale. As a result, structural designs have centered on these smaller materials. Nevertheless, the structure of vapor-deposited glasses can have an important influence on their physical and functional properties.

There are several techniques for measuring surface roughness. One of them is a profilometry, which uses a cone-shaped stylus to record the micro-geometrical form of the surface. Another technique is an atomic force microscope, which scans areas of 1 micrometer by 1 micrometer to 10 mm by 10 mm.

These methods may not be adequate for viscous samples. However, they can measure overall roughness of large areas. A surface roughness model is a recent development that can predict roughness with a relative error of less than 5%. It has been found that surface roughness of a glass substrate is a major factor in the performance of a thin film.

For instance, the roughness of a silicon wafer determines the quality of components it will be used to manufacture. It has been shown that increasing the surface roughness of a film can influence the breakdown strength and wear rate. This effect is due to the fact that the friction coefficient of polymer composites is largely a function of its roughness. It is also important to note that the surface topographic pattern of the substrate is an important aspect of this phenomenon.


During the process of ion implantation silicon film transfer, there are some undesirable features that can be seen in the semiconductor layer such as canyons and pin holes. These defects can interfere with the operation of transistors and cause circuit malfunctions. They also tend to occur more frequently in SOI structures with glass support substrates. However, there are techniques to reduce these defects.

One of the methods is to provide a barrier layer between the glass substrate and the silicon layer. This is done by depositing a thin oxide layer that inhibits the formation of pin holes. Some of these layers may be as thin as 100 nm.

Another method is to make the bonding surface hydrophilic by oxidizing it. This removes harmful glass constituents. Alternatively, a thermal bonding process is used. The temperature of the junction is dependent on the characteristics of the glass substrate and the type of semiconductor material. This can range from -100deg C. and -50deg C., to -250deg C. and -100deg C.

During the anodic bonding process, the negative ions of the glass substrate are removed from the positive ions of the donor wafer. The remaining portion of the glass substrate remains the original bulk material. The pressure applied to the intermediate assembly may range from 1 to 50 psi. The strain point of the glass substrate should be greater than 500deg C.

The silicon nitride, Si3N4, has a Young's modulus of 210-380GPa. This makes it a strong barrier against alkali metals and other elements. Therefore, it is not readily bonded to the glass substrate.

When the silicon nitride is deposited on the glass substrate, the resulting stiffening layer is a barrier to impurities in the glass substrate. This can help prevent the occurrence of pin holes and canyons in the exfoliation layer.

Pin holes

During the manufacture of semiconductor structures on glass (SiOG), pin holes may occur. The presence of pin holes is believed to be a result of the ion implantation process used in the transfer of silicon film to a glass substrate.

In some applications, the formation of pin holes can disrupt the functioning of a transistor. The use of a barrier layer between a glass substrate and a silicon layer may help to prevent the occurrence of pin holes. In other cases, the application of mechanical pressure to an intermediate assembly may be necessary.

During the manufacturing of a silicon on glass (SiOG) structure, the silicon layer on a glass substrate is transferred from the donor semiconductor wafer. This process is commonly performed at a temperature of around 500 deg C.

The resulting semiconductor on glass ceramic structure can be either a semiconductor on glass (SOG) or a semiconductor on glass-ceramic (SiOG). In SOG structures with a glass support substrate, the silicon layer may form a thin oxide layer that inhibits the formation of pin holes. The thickness of the oxide layer may be as little as 2 nm or as much as 5 nm.

A Si3N4 stiffening layer is also deposited on the glass substrate. This layer has a Young's modulus of 300 GPa or higher. This stiffening layer has surface roughness with a skewness level of 0.6 or lower.

A low/reduced positive ion concentration layer 132 is also deposited on the glass substrate. The reduction of the positive ion concentration on the glass substrate is achieved by the migration of the positive ions away from a higher voltage potential on the donor semiconductor wafer. This barrier layer is positioned adjacent to the silicon exfoliation layer.

Excessive silicon layer thickness

During semiconductor applications with excessive silicon layer thickness, there are several options for transferring the silicon film onto the glass substrate. Specifically, there are three possible types of ion implantation processes that can be used. In one method, the silicon film is ion deposited directly onto the glass substrate. The resulting "in-situ" SiO2 barrier layer is a hydrophilic surface that allows the silicon layer to bond to the glass substrate. In another technique, the silicon film is bonded to a bonding surface on the donor wafer. This process can remove harmful glass constituents and provides a barrier layer between the silicon layer and the glass substrate.

In a third technique, a silicon nitride (Si3N4) stiffening layer is deposited on the bonding surface of the donor wafer. The stiffening layer is a strong barrier against alkali metals and other elements that may be present in the glass substrate. It also reduces the number of pin holes in the silicon exfoliation layer. The stiffening layer has a Young's modulus of at least 125 GPa. It was measured by an optical technique using a Zygo tool.

A fifth experimental sample was prepared according to the techniques described in the preceding examples. This sample had a bi-layer structure consisting of a silicon nitride (Si3N4) and a SiO2 layer. This type of structure is also applicable to other SOG substrates. The thin silicon exfoliation layer is 300-500 nm thick.

The ion implanting process results in a weakened region 123' in the donor tile 120'. The remaining portion of the donor tile is ion implanted into the Si3N4 stiffening layer 142. This process can produce pin holes 30 and canyons 20. The presence of pin holes and canyons may disrupt the formation and operation of transistors.

Market segmentation

Various factors are influencing the growth of the global glass substrates semiconductor applications market segmentation. These include the demand from the end-use industries, the market demand, the growth of the electronics industry and the development of new products.

The market is mainly driven by the growing electronics industry and the growing demand for flexible substrates from the electronic industry across the globe. The increase in the production of electronic devices in the Asia-Pacific region and the availability of cheap labor are expected to propel the market growth in the coming years. The region is expected to command a major share of the global market during the forecast period.

The market for the flexible substrates in the semiconductor applications market is primarily driven by the fast-growing consumer electronics sector and the increasing production of automobiles in the APAC region. In addition to this, the rapid digitization of the enterprises in the APAC region is also boosting the electronics manufacturing market in the region. The market is also expected to witness significant growth in the coming years due to the increased demand from private companies in the electronics industry.

The glass substrates semiconductor applications market is divided into five regions, namely, North America, South America, Europe, Asia Pacific and Middle East & Africa. The study provides an exhaustive PEST analysis for all the five regions. Moreover, the report provides market size and forecast estimates for the five regions.

The main application segments of the glass substrates semiconductor applications market include Consumer Electronics, Automotive, Aerospace & Defense and Medical Devices. The Consumer Electronics application segment accounts for the largest share of the market and is anticipated to show the highest growth rate in the coming five years.