Indium Gallium Arsenide (InGaAs) Wafers for Research

University Wafer Silicon Wafers and Semicondcutor Substrates Services
University Silicon Wafer for Production

Get your InGaAs quote FAST! Guaranteed!

 


 

Indium Gallium Arsenide Wafers In Stock

 

InGaAs is a high-mobility semiconductor that promises to increase a transistor's performance for high-frequency applications.

 

A research client from a large semiconductor equipment manufacturer was interested in our InGaAs wafers.

 

Can you give me quotes on the 2" InGaAs wafers for the items below? 1. bare wafers, qty=10 to 100 2. Epi: Lattice matched n-type InGaAs:Si[100]±0.5°, thickness: 1.0um(±20%), Nc=1E17/cc, qty=10 to 100 3. InP/InGaAs/InP Epi wafers, qty=10 to 100

 

UniversityWafer, Inc. asked the following Questions.

 

Y ou want me to quote the three structures shown in the image below? Material Stack. Is that correct?

Regarding (1)
a. Semi-Insulating InP - that is to be 2"Ø InP:Fe(100) substrate wafer and it is to be 400µm {not 400nm} thick. Is that correct?
b. 150nm InP layer - that is to be n-type InP:Si, Nc=(3-8)E18/cc. Is that correct ?
c. 850nm InGaAs layer - that is undoped, lattice matched In(0.53)Ga(0.47)As - Is that correct ?
d. 160nm GaAsSb layer - that is p-type (Zn doped), lattice matched GaAs(0.51)Sb(0.49):Zn - is that correct?
Nc=2E10/cc is unrealistic, if you want p+ then perhaps (3-8)E18/cc or even (1-3)E19/cc is reasonable - please decide

Regarding (2)
a. Semi-Insulating InP - that is to be 2"Ø InP:Fe(100) substrate wafer and it is to be 400µm {not 400nm} thick. Is that correct?
b. 150nm InP layer - that is to be n-type InP:Si, Nc=(3-8)E18/cc. Is that correct ?
c. 2,000nm InGaAs layer - that is undoped, lattice matched In(0.53)Ga(0.47)As - Is that correct ?
d. 160nm GaAsSb layer - that is p-type (Zn doped), lattice matched GaAs(0.51)Sb(0.49):Zn - is that correct?
Nc=2E10/cc is unrealistic, if you want p+ then perhaps (3-8)E18/cc or even (1-3)E19/cc is reasonable - please decide

Regarding (3)
a. Is the substrate to be 2"Ø Semi-Insulating GaAs:-(100), 400µm thick ?
b. The three layers, 1,600nm, 300nm and 100nm are these all undoped GaAs or should they be doped to different degrees?
What do you mean by HT
c. 10× - that is to be 10 layers of In(0.16)Ga(0.84)As, 12nm thick, interspersed with 0 layers of GaAs, 12nm thick - is that correct?
Are these to be undoped or doped to be p-type ? Do specify target Nc.
d. The 400 nm GaAs spacer - is that to be undoped ?
e. 10×- that is to be 10 layers of In(0.16)Ga(0.84)As, 12nm thick, interspersed with 0 layers of GaAs, 12nm thick - is that correct?
Are these to be undoped or doped to be n-type ? Do specify target Nc.
f. 750 nm n+ GaAs - is that to be GaAs:Si, Nc=(3-8)E18/cc ?

 

indium gallium arsenide substrates

 

 

Please answer above to clarify what is needed.

 

Are you asking us to quote to make structures that you already use, or is this an experimental project/ If it is experimental then perhaps 1 wafer would be a better quantity to start with.

Do you actually need above structures or are you trying to get budgetary estimates. If these are budgetary estimates then I can give you an overall cost structure and you would not have to detail each request {for example, within broad limits the type and degree of doping has no influence on cost}.

 

We do want to help you any way that we can.

 

For your item 1:

What do you mean by "bare InGaAs" wafer?
Do you mean bulk InGaAs wafers, say 400µm thick?
What In:Ga ratio do you require?, Is it In(0.53)Ga(0.47)As or some other In;Ga ratio?
Are the wafers to be one-side-polished or double-side-polished ?

For your item 2:
What is the Epi-layer thickness? what is the Epi-layer doping?
The substrate InP wafer, is it to be Semi-Insulating or n-type Semi-Conducting?
Here is an example of such a wafer:


Item Qty. Description
GD16. 2/3/10 InGaAs:Si on InP:Fe Epi wafers,
Substrate: P/P 2"Ø×350±25µm InP:Fe[100]±0.5°, Ro>1E7 Ohmcm, EPD<1E4/cm²,
Both-sides-polished, EJ Flats (two),
EPI Layer: 0.75±0.15µm thick, n-type Lattice matched In(0.53)Ga(0.47)As:Si, Nc>2E18/cc
Note: Epi layer roughness close to one molecular layer; Some backside deposits expected.
Sealed in single wafer cassettes
Price: Depends on Qauntitiy

For your item 3
What is the IP Epi-layer thickness? what is the Epi-layer doping?
What is the InGaAs Epi-layer thickness? what is the Epi-layer doping?
The substrate InP wafer, is it to be Semi-Insulating or n-type Semi-Conducting?

 


Current InGaAs Inventory - Buy Online!

 

50.8mm Undoped (100) 350um SSP

Epi: Lattice matched n-type InGaAs:Si[100]±0.5°, thickness: 1.0um(±20%), Nc=1E17 -1E18/cc.

Sealed in individual wafer container. Substrate: 2" Indium Phosphide wafers, P/E 2"Ø×350±25µm.

 

Epi: Lattice matched p-type InGaAs:Zn[100]±0.5°, thickness: 1.0um(±20%),Nc=1E17 -1E18/cc.

Sealed in individual wafer container. Substrate: Indium Phosphide wafers, P/E 2"Ø×350±25µm.

 

50.8mm InP/InGaAs/InP Epi wafers

Substrate: Indium Phosphide wafers, P/E 2"Ř×380ą25ľm,  n-type P:S[100]ą0.5°,EDP<1E4/cm2.

One-side-polished, back-side matte etched, SEMI Flats.

Epi 1: InGaAs:[100] (100nm, etching stop layer).

 Epi 2: InP:[100](50nm, bonding layer).

Indium Gallium Arsenide Applications

 

Photodetectors

Commonly used to measure optical power in the near IR (NIR) range.

Indium Gallium Arsenide Photodetector

Transitors

Indium Gallium Arsenide Transistor

We sell the InGaAs and InP Substrates.

 

One concern with growing InGaAs on silicon is lattice mismatch.


Our engineers may be able to help yu in this regard. Please email us today.