Semiconductor Technology | Substrates for Research & Production

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Semiconductor Technology

Electronic devices are mainly made up of a small but sophisticated integrated circuit that is capable of handling some specific or general instructions. This integrated circuit has two main parts i.e. a small fragile silicon chip and an external package covering the chip. The external package provides a way in which the chip can interact with other external peripherals. In ICs, the electronic components such as transistors are built on the surface of a wafer as opposed to having to assemble ready-made devices and connecting them in a given way through soldering. The technology behind semiconductor devices is complex owing to the technical processes that are involved.

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Semiconductor Elements

Semiconductors are elements characterized by having a resistivity and conductivity value that is between that of conductors and insulators. Semiconductors are desired as it is possible to modify their resistivity values by introducing impurities to the material. Common impurities that can be used are Boron (P-type), Phosphorous, or Arsenic (N-type). Most semiconductor manufacturers do buy wafers that are pre-doped with either n-type or p-type impurities at levels of one doping atom per ten million silicon atoms. The percentage concentration of a dopant in a semiconductor material ranges from 0.000001 percent to 0.1 percent. With this, sections of accurate resistivity values can be found.

Crystal growth techniques include the Czochralksi process, the Bridgeman, or the Float Zone method. Currently, three-hundred-millimeter diameter wafers are produced using the Czochralksi approach. Large wafers are advantageous as they result in increased productivity, increased profits, and lower costs. This is because many processors can be made from a single chip. Despite this, semiconductor technologies generally do need high capital investments as it is quite expensive.

a. Semiconductor device fabrication

The process of making semiconductor devices can be grouped into two main stages. The first step involves fabricating the wafer while the second is processing and packing the die.

flowchart showing the manufacturing sequence of Integrated circuits

Figure 1: A flowchart showing the manufacturing sequence of Integrated circuits.

Wafer fabrication

Similar integrated circuits are made on each wafer as a result of the various processes that have to be done. Each process that is taken while fabricating the wafer is significant as it either adds or modifies the layers present. A summary of the steps is presented below though some of them may be repeated.

Photo-masking - This process is done to shape the various components. A wafer that has resin applied on its surface is exposed to light with the aid of a specific mask. The light has the effect of softening some parts of the wafer thus the desired geometry can be obtained after the soft areas have been washed away. This operation has to be repeatedly undertaken until the desired results are achieved.

photomasking steps

Figure 2: The Photomasking Procedure


This operation is done to eliminate thin films of the material and can be achieved by employing either liquid or gaseous compounds. At the end of this procedure, a given circuit pattern is obtained that has been specified in photo-masking. This process has to be done when deposition takes place to a layer that has to be etched.

the etching step

The process of etching


This operation is done to introduce dopants to the semiconductor material. Alternatively, a thin oxide-based layer may be introduced to the semiconductor surface using this method. A wafer is placed inside a furnace then doping gases are introduced inside the furnace.

Ionic implantation – entails the use of an electron beam to introduce dopants to the semiconductor material. This method makes it possible to implant dopant's some depth inside the silicon material allowing for better control of the primary parameters. It is easier to achieve the doping of semiconductors using this method as compared to diffusion though at a higher cost.

comparison between Diffusion and Ionic Implantation

Figure 4: A comparison between Diffusion and Ionic Implantation Process

Metal Deposition

This process aids in providing electrical connections in the different cells of the integrated circuit. Evaporation or sputtering methods are used to deposit the metal to the desired paths in the circuit. Sputtering involves creating a plasma with argon atoms that bump on a target surface ripping metal atom from the target. Projection of atoms happens in almost every direction though most of the atoms undergo condensation on the substrate surface.

metal deposition steps

Figure 5: The metal deposition process


A layer of silicon oxide or silicon nitride is used to seal the wafer preventing contamination or moisture attack.


This step involves a reduction in the wafer thickness.

II. Wafer Probing

In this step, the functionality of the device is carried out. All the electrical tests have to be done using special microprobes. Wafer probing is done in either process parametric tests or full wafer probing test. Process parametric tests are done on some samples while the later has to be done on the end product on all dies.

illustration of the wafer probing process

Figure 6: An illustration of the wafer probing process

The bad chips are labeled using a black dot to facilitate the separation of the bad from the good dies. The damaged dies are then studied to ascertain the root cause of the failure and possible correction strategies. The yield value is a percentage expression of functional dies existing in a single wafer. III.

The Assembly process

 illustration of the assembly process

Figure 7: An illustration of the assembly process

Thin wires with diameters of about thirty-three microns are used to establish the connection of the chips to the outside world. Through these connections, various signals may be fed to the chip while respective outputs are obtained. A wire bonding procedure best illustrates the wire connection process.

Figure 8: Wire bonding procedure

After the bounding operation, a ceramic or plastic casing has to be placed on the chip to make handling of the chip easier and also protect the chip from external interferences and shock. The place where the chip is to be used does have a significant impact on the shape and size of the package to be used. After these steps, a traceability code has to be printed on the casings' top surface in most cases to provide manufacturing details.